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Message-ID: <188ffb7d-47e2-45fd-80b1-b31ca58f0c0b@sirena.org.uk>
Date: Mon, 24 Feb 2025 14:30:56 +0000
From: Mark Brown <broonie@...nel.org>
To: Rengarajan S <rengarajan.s@...rochip.com>
Cc: unglinuxdriver@...rochip.com, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 for-next] spi: mchp-pci1xxxx: Updated memcpy
implementation for x64 and bcm2711 processors
On Mon, Feb 24, 2025 at 06:21:53PM +0530, Rengarajan S wrote:
> In Raspberry-pi CM4 devices with BCM2711 processor, the documentation
> points to a limitation with 64-bit accesses. Using memcpy_fromio and
> memcpy_toio for each 64-bit SPI read/write causes the first 4 bytes to be
> repeated. To address the limitation, each read/write is limited to 4
> bytes in case of BCM2711 processors.
This feels like something we ought to be able to figure out from the PCI
subsystem rather than requiring us to enumerate specific SoCs, or at
least have PCI drivers be able to enumerate the system PCI quirk from
the PCI core. What's the story with making this a per driver per SoC
thing - is there some reason it won't come up elsewhere?
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