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Message-ID: <20250224180614.GA11336@google.com>
Date: Mon, 24 Feb 2025 18:06:14 +0000
From: Eric Biggers <ebiggers@...nel.org>
To: linux-kernel@...r.kernel.org
Cc: linux-crypto@...r.kernel.org, linux-riscv@...ts.infradead.org,
Zhihang Shao <zhihang.shao.iscas@...il.com>,
Ard Biesheuvel <ardb@...nel.org>, Xiao Wang <xiao.w.wang@...el.com>,
Charlie Jenkins <charlie@...osinc.com>
Subject: Re: [PATCH 0/4] RISC-V CRC optimizations
On Sun, Feb 16, 2025 at 02:55:26PM -0800, Eric Biggers wrote:
> This patchset is a replacement for
> "[PATCH v4] riscv: Optimize crct10dif with Zbc extension"
> (https://lore.kernel.org/r/20250211071101.181652-1-zhihang.shao.iscas@gmail.com/).
> It adopts the approach that I'm taking for x86 where code is shared
> among CRC variants. It replaces the existing Zbc optimized CRC32
> functions, then adds Zbc optimized CRC-T10DIF and CRC64 functions.
>
> This new code should be significantly faster than the current Zbc
> optimized CRC32 code and the previously proposed CRC-T10DIF code. It
> uses "folding" instead of just Barrett reduction, and it also implements
> Barrett reduction more efficiently.
>
> This applies to crc-next at
> https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git/log/?h=crc-next.
> It depends on other patches that are queued there for 6.15, so I plan to
> take it through there if there are no objections.
>
> Tested with crc_kunit in QEMU (set CONFIG_CRC_KUNIT_TEST=y and
> CONFIG_CRC_BENCHMARK=y), both 32-bit and 64-bit. I don't have real Zbc
> capable hardware to benchmark this on, but the new code should work very
> well; similar optimizations work very well on other architectures.
Any feedback on this series from the RISC-V side?
- Eric
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