[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Z7xZwGTIKgj9_zNZ@nchen-desktop>
Date: Mon, 24 Feb 2025 19:36:32 +0800
From: Peter Chen <peter.chen@...tech.com>
To: Marcin Juszkiewicz <marcin@...zkiewicz.com.pl>
Cc: "arnd@...db.de" <arnd@...db.de>,
"catalin.marinas@....com" <catalin.marinas@....com>,
cix-kernel-upstream <cix-kernel-upstream@...tech.com>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Fugang Duan <fugang.duan@...tech.com>,
"krzk+dt@...nel.org" <krzk+dt@...nel.org>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"robh@...nel.org" <robh@...nel.org>,
"will@...nel.org" <will@...nel.org>
Subject: Re: [PATCH 6/6] arm64: dts: cix: add initial CIX P1(SKY1) dts support
On 25-02-23 04:05:10, Marcin Juszkiewicz wrote:
>
> > diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
> > new file mode 100644
> > index 000000000000..d98735f782e0
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/cix/sky1.dtsi
> > @@ -0,0 +1,264 @@
> > +// SPDX-License-Identifier: BSD-3-Clause
> > +/*
> > + * Copyright 2025 Cix Technology Group Co., Ltd.
> > + *
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
>
> [..]
>
> > + arch_timer: timer {
> > + compatible = "arm,armv8-timer";
> > + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
> > + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
> > + clock-frequency = <1000000000>;
> > + interrupt-parent = <&gic>;
> > + arm,no-tick-in-suspend;
> > + };
>
> This is not Arm v8.0 SoC so where is non-secure EL2 virtual timer?
It is the Arm v9 SoC and back compatible with Arm v8.
--
Best regards,
Peter
Powered by blists - more mailing lists