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Message-ID: <d6440feb-ea23-49f8-9886-82d0e2145f12@ti.com>
Date: Mon, 24 Feb 2025 17:35:47 +0530
From: Vignesh Raghavendra <vigneshr@...com>
To: Siddharth Vadapalli <s-vadapalli@...com>, <nm@...com>, <kristo@...nel.org>,
<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <srk@...com>
Subject: Re: [PATCH 2/3] arm64: dts: ti: k3-j784s4-j742s2-evm: Add overlay for
PCIe NTB
On 02/02/25 15:06, Siddharth Vadapalli wrote:
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-pcie-ntb.dtso b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-pcie-ntb.dtso
> new file mode 100644
> index 000000000000..e44173f670fa
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-pcie-ntb.dtso
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0-only OR MIT
> +/**
> + * DT Overlay for enabling NTB functionality using PCIE0 and PCIE1 instances of
> + * PCIe on the J784S4 EVM and the J742S2 EVM.
> + *
> + * J784S4 EVM Product Link: https://www.ti.com/tool/J784S4XEVM
> + * J742S2 EVM Product Link: https://www.ti.com/tool/J742S2XH01EVM
> + *
> + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/ti,sci_pm_domain.h>
> +
> +#include "k3-pinctrl.h"
> +
> +&{/} {
> + epf_bus {
no underscore in node name please
> + compatible = "pci-epf-bus";
> +
> + ntb {
> + compatible = "pci-epf-ntb";
> + epcs = <&pcie0_ep>, <&pcie1_ep>;
> + epc-names = "primary", "secondary";
> + vendor-id = /bits/ 16 <0x104c>;
> + device-id = /bits/ 16 <0xb012>;
> + num-mws = <4>;
> + mws-size = <0x100000>, <0x100000>, <0x100000>, <0x100000>;
> + };
> + };
> +};
> +
--
Regards
Vignesh
https://ti.com/opensource
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