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Message-ID: <CAEnQRZBL+r2-CRDszK54SD_8E9=1QRKRj3_YDHsM7YetKMcs_w@mail.gmail.com>
Date: Tue, 25 Feb 2025 15:41:58 +0200
From: Daniel Baluta <daniel.baluta@...il.com>
To: Philipp Zabel <p.zabel@...gutronix.de>
Cc: Daniel Baluta <daniel.baluta@....com>, robh@...nel.org, krzk+dt@...nel.org, 
	shawnguo@...nel.org, mathieu.poirier@...aro.org, conor+dt@...nel.org, 
	s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, imx@...ts.linux.dev, 
	linux-arm-kernel@...ts.infradead.org, linux-remoteproc@...r.kernel.org, 
	andersson@...nel.org, Frank.Li@....com, peng.fan@....com, 
	laurentiu.mihalcea@....com, iuliana.prodan@....com
Subject: Re: [PATCH v3 2/8] dt-bindings: dsp: fsl,dsp: Add resets property

Hello Philipp,

Thanks for your comments!

> The DAP core reset is mentioned in the commit message. Why is it
> missing here? After reading the discussion in [1], I'd expect both the
> stall and the (core) reset signal to be documented, something like:

There is no reset controller driver for DAP area yet. We manipulate
the bits directly by
remapping the DAP address space inside remoteproc driver.

See for example: drivers/remoteproc/imx_dsp_rproc.c

/* Reset function for DSP on i.MX8MP */
static int imx8mp_dsp_reset(struct imx_dsp_rproc *priv)
{
»       void __iomem *dap = ioremap_wc(IMX8M_DAP_DEBUG,
IMX8M_DAP_DEBUG_SIZE);
»       int pwrctl;

»       /* Put DSP into reset and stall */
»       pwrctl = readl(dap + IMX8M_DAP_PWRCTL);
»       pwrctl |= IMX8M_PWRCTL_CORERESET;
»       writel(pwrctl, dap + IMX8M_DAP_PWRCTL);


If we agree that this is the right way to go, the next step would be
to create a new reset
controller driver for DAP area.

I want to keep this as a follow up patch in order to not compilate
this patch series even more.

<snip>

> >        memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>,
> >                        <&dsp_vdev0vring1>, <&dsp_reserved>;
> > -      fsl,dsp-ctrl = <&audio_blk_ctrl>;
>
> Is there nothing else in this range that will have to be controlled by
> the DSP driver in the future, such as the IMPWIRE register or the
> XOCDMODE[OCDHALTONRESET] bit?

We are internally running SOF for couple of years now and we didn't
need any of these bits.

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