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Message-ID: <2df7bdd9-5072-4a9a-b142-1e1e3f20130c@foss.st.com>
Date: Tue, 25 Feb 2025 15:57:49 +0100
From: Fabrice Gasnier <fabrice.gasnier@...s.st.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: <lee@...nel.org>, <ukleinek@...nel.org>, <alexandre.torgue@...s.st.com>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <wbg@...nel.org>, <jic23@...nel.org>, <daniel.lezcano@...aro.org>,
        <tglx@...utronix.de>, <catalin.marinas@....com>, <will@...nel.org>,
        <devicetree@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <linux-iio@...r.kernel.org>, <linux-pwm@...r.kernel.org>,
        <olivier.moysan@...s.st.com>
Subject: Re: [PATCH 4/8] clocksource: stm32-lptimer: add stm32mp25 support

On 2/25/25 13:02, Krzysztof Kozlowski wrote:
> On Mon, Feb 24, 2025 at 07:01:46PM +0100, Fabrice Gasnier wrote:
>> From: Patrick Delaunay <patrick.delaunay@...s.st.com>
>>
>> Add the support of the new compatible for STM32MP25 SoC in driver, as
>> described in Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml
>> and used in arch/arm64/boot/dts/st/stm32mp251.dtsi.
>>
>> Signed-off-by: Patrick Delaunay <patrick.delaunay@...s.st.com>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...s.st.com>
>> ---
>>  drivers/clocksource/timer-stm32-lp.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/clocksource/timer-stm32-lp.c b/drivers/clocksource/timer-stm32-lp.c
>> index a4c95161cb22..db055348e2cc 100644
>> --- a/drivers/clocksource/timer-stm32-lp.c
>> +++ b/drivers/clocksource/timer-stm32-lp.c
>> @@ -197,6 +197,7 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev)
>>  
>>  static const struct of_device_id stm32_clkevent_lp_of_match[] = {
>>  	{ .compatible = "st,stm32-lptimer-timer", },
>> +	{ .compatible = "st,stm32mp25-lptimer-timer", },
>>  	{},
> 
> Same question.

Oops, I just figured out I have missed a change to this driver, to
enable interrupts, in order to comply with the LPTimer spec, starting
with STM32MP25.

E.g. with earlier STM32MP13, STM32MP15 or even STM32H7:
* The LPTIM_IER register must only be modified when the LPTIM is
disabled (ENABLE bit reset to ‘0’)

On STM32MP25:
* The LPTIMx_DIER register must only be modified when the LPTIM is
enabled (ENABLE bit set to 1)

I'll add this as compatible data in next revision.

Best regards,
Fabrice

> 
> Best regards,
> Krzysztof
> 

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