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Message-ID: <b687b44b-013e-44b0-b97f-9f7ee2c2a62f@kernel.org>
Date: Tue, 25 Feb 2025 18:41:47 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Svyatoslav Ryhel <clamor95@...il.com>, Rob Herring <robh@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Thierry Reding
 <thierry.reding@...il.com>, Jonathan Hunter <jonathanh@...dia.com>,
 Peter De Schrijver <pdeschrijver@...dia.com>,
 Prashant Gaikwad <pgaikwad@...dia.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Jonathan Cameron <Jonathan.Cameron@...wei.com>,
 Georgi Djakov <djakov@...nel.org>, Dmitry Osipenko <digetx@...il.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 linux-tegra@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v1 6/9] dt-bindings: memory: Document Tegra114 External
 Memory Controller

On 25/02/2025 15:34, Svyatoslav Ryhel wrote:
> +
> +properties:
> +  compatible:
> +    const: nvidia,tegra114-emc
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: emc

Drop clock-names

> +
> +  interrupts:
> +    maxItems: 1
> +
> +  "#interconnect-cells":
> +    const: 0
> +
> +  nvidia,memory-controller:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      phandle of the memory controller node

For what? Your description copies property name and schema, which makes
it useless. Say something not obvious - why this is needed here, what
its purpose is. Do not repeat schema nor property name.

> +
> +  power-domains:
> +    maxItems: 1
> +    description:
> +      Phandle of the SoC "core" power domain.

Drop description, redundant.

> +
> +  operating-points-v2:
> +    description:
> +      Should contain freqs and voltages and opp-supported-hw property, which is
> +      a bitfield indicating SoC speedo ID mask.
> +
> +patternProperties:
> +  "^emc-timings-[0-9]+$":
> +    type: object
> +    additionalProperties: false
> +    properties:
> +      nvidia,ram-code:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        description:
> +          value of the RAM_CODE field in the PMC_STRAPPING_OPT_A register that
> +          this timing set is used for
> +
> +    patternProperties:
> +      "^timing-[0-9]+$":
> +        type: object
> +        properties:
> +          clock-frequency:
> +            description:
> +              external memory clock rate in Hz
> +            minimum: 1000000
> +            maximum: 1000000000
> +
> +          nvidia,emc-auto-cal-config:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description:
> +              value of the EMC_AUTO_CAL_CONFIG register for this set of timings
> +
> +          nvidia,emc-auto-cal-config2:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description:
> +              value of the EMC_AUTO_CAL_CONFIG2 register for this set of timings
> +
> +          nvidia,emc-auto-cal-config3:
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            description:
> +              value of the EMC_AUTO_CAL_CONFIG3 register for this set of timings
> +
> +          nvidia,emc-auto-cal-interval:
> +            description:
> +              pad calibration interval in microseconds

User proper unit suffix

> +            $ref: /schemas/types.yaml#/definitions/uint32

Drop

> +            minimum: 0
> +            maximum: 2097151
> +
Best regards,
Krzysztof

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