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Message-ID: <174050748689.199016.8043254114817192987.b4-ty@kernel.org>
Date: Tue, 25 Feb 2025 12:18:06 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Georgi Djakov <djakov@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Sibi Sankar <quic_sibis@...cinc.com>,
	Konrad Dybcio <konradybcio@...nel.org>,
	Neil Armstrong <neil.armstrong@...aro.org>
Cc: linux-arm-msm@...r.kernel.org,
	linux-pm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/3] arm64: qcom: sm8650: add DDR, LLCC & L3 CPU bandwidth scaling


On Tue, 11 Feb 2025 13:56:36 +0100, Neil Armstrong wrote:
> Add the OSM L3 controller node then add the necessary interconnect
> properties with the appropriate OPP table for each CPU cluster to
> allow the DDR, LLCC & L3 CPU bandwidth to scale along the CPU
> cluster operating point.
> 
> 

Applied, thanks!

[1/3] arm64: dts: qcom: sm8650: add OSM L3 node
      commit: 62a770da5327910233ff0b0e1989e14feb3d766e
[2/3] arm64: dts: qcom: sm8650: add cpu interconnect nodes
      commit: c9658c3963b8a5ebe488acfa2609fc641a126b60
[3/3] arm64: dts: qcom: sm8650: add cpu OPP table with DDR, LLCC & L3 bandwidths
      commit: c24db2c178578ab069dba8be81ef278854bad74f

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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