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Message-ID: <20250225112543.GM11590@noisy.programming.kicks-ass.net>
Date: Tue, 25 Feb 2025 12:25:43 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Dapeng Mi <dapeng1.mi@...ux.intel.com>
Cc: Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Kan Liang <kan.liang@...ux.intel.com>,
Andi Kleen <ak@...ux.intel.com>,
Eranian Stephane <eranian@...gle.com>, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, Dapeng Mi <dapeng1.mi@...el.com>
Subject: Re: [Patch v2 12/24] perf/x86/intel: Allocate arch-PEBS buffer and
initialize PEBS_BASE MSR
On Tue, Feb 18, 2025 at 03:28:06PM +0000, Dapeng Mi wrote:
> Arch-PEBS introduces a new MSR IA32_PEBS_BASE to store the arch-PEBS
> buffer physical address. This patch allocates arch-PEBS buffer and then
> initialize IA32_PEBS_BASE MSR with the buffer physical address.
Just to clarify, parts with ARCH PEBS will not have BTS and thus not
have DS?
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