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Message-ID: <20250226130935.3029927-8-thierry.bultel.yh@bp.renesas.com>
Date: Wed, 26 Feb 2025 14:09:26 +0100
From: Thierry Bultel <thierry.bultel.yh@...renesas.com>
To: thierry.bultel@...atsea.fr
Cc: linux-renesas-soc@...r.kernel.org,
geert@...ux-m68k.org,
paul.barker.ct@...renesas.com,
Thierry Bultel <thierry.bultel.yh@...renesas.com>,
linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org
Subject: [PATCH v3 07/13] serial: sh-sci: Fix a comment about SCIFA
The comment was correct when it was added, at that time RZ/T1 was
the only SoC in the RZ/T line. Since then, further SoCs have been
added with RZ/T names which do not use the same SCIFA register
layout and so the comment is now misleading.
So we update the comment to explicitly reference only RZ/T1 SoCs.
Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Reviewed-by: Paul Barker <paul.barker.ct@...renesas.com>
---
drivers/tty/serial/sh-sci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 4bc637f9d649..b591f3573337 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -305,7 +305,7 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = {
},
/*
- * The "SCIFA" that is in RZ/A2, RZ/G2L and RZ/T.
+ * The "SCIFA" that is in RZ/A2, RZ/G2L and RZ/T1.
* It looks like a normal SCIF with FIFO data, but with a
* compressed address space. Also, the break out of interrupts
* are different: ERI/BRI, RXI, TXI, TEI, DRI.
--
2.43.0
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