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Message-ID: <e7fea60f-dac3-4762-9139-cf096d7bc121@linaro.org>
Date: Wed, 26 Feb 2025 13:33:10 +0000
From: James Clark <james.clark@...aro.org>
To: Leo Yan <leo.yan@....com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Ian Rogers <irogers@...gle.com>,
 Mike Leach <mike.leach@...aro.org>, Mark Rutland <mark.rutland@....com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Jiri Olsa <jolsa@...nel.org>, Adrian Hunter <adrian.hunter@...el.com>,
 "Liang, Kan" <kan.liang@...ux.intel.com>, Will Deacon <will@...nel.org>,
 Graham Woodward <graham.woodward@....com>, Paschalis.Mpeis@....com,
 linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 06/12] perf arm-spe: Fix load-store operation checking



On 17/02/2025 7:59 pm, Leo Yan wrote:
> The ARM_SPE_OP_LD and ARM_SPE_OP_ST operations are secondary operation
> type, they are overlapping with other second level's operation types
> belonging to SVE and branch operations.  As a result, a non load-store
> operation can be parsed for data source and memory sample.
> 
> To fix the issue, this commit introduces a is_ldst_op() macro for
> checking LDST operation, and apply the checking when synthesize data
> source and memory samples.
> 
> Fixes: a89dbc9b988f ("perf arm-spe: Set sample's data source field")
> Signed-off-by: Leo Yan <leo.yan@....com>
> ---
>   tools/perf/util/arm-spe.c | 8 +++++++-
>   1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c
> index 251d214adf7f..0e8e05c87fd7 100644
> --- a/tools/perf/util/arm-spe.c
> +++ b/tools/perf/util/arm-spe.c
> @@ -37,6 +37,8 @@
>   #include "../../arch/arm64/include/asm/cputype.h"
>   #define MAX_TIMESTAMP (~0ULL)
>   
> +#define is_ldst_op(op)		(!!((op) & ARM_SPE_OP_LDST))
> +
>   struct arm_spe {
>   	struct auxtrace			auxtrace;
>   	struct auxtrace_queues		queues;
> @@ -681,6 +683,10 @@ static u64 arm_spe__synth_data_source(struct arm_spe_queue *speq,
>   {
>   	union perf_mem_data_src	data_src = { .mem_op = PERF_MEM_OP_NA };
>   
> +	/* Only synthesize data source for LDST operations */
> +	if (!is_ldst_op(record->op))
> +		return 0;
> +
>   	if (record->op & ARM_SPE_OP_LD)
>   		data_src.mem_op = PERF_MEM_OP_LOAD;
>   	else if (record->op & ARM_SPE_OP_ST)
> @@ -779,7 +785,7 @@ static int arm_spe_sample(struct arm_spe_queue *speq)
>   	 * When data_src is zero it means the record is not a memory operation,
>   	 * skip to synthesize memory sample for this case.
>   	 */
> -	if (spe->sample_memory && data_src) {
> +	if (spe->sample_memory && is_ldst_op(record->op)) {
>   		err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
>   		if (err)
>   			return err;

Reviewed-by: James Clark <james.clark@...aro.org>


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