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Message-ID: <174057724683.237840.9228702761146202585.b4-ty@kernel.org>
Date: Wed, 26 Feb 2025 07:40:48 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konradybcio@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Neil Armstrong <neil.armstrong@...aro.org>
Cc: linux-arm-msm@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v4 0/4] arm64: dts: qcom: sm8650: rework CPU & GPU thermal zones


On Mon, 03 Feb 2025 14:23:16 +0100, Neil Armstrong wrote:
> On the SM8650 platform, the dynamic clock and voltage scaling (DCVS) for
> the CPUs is handled by hardware & firmware using factory and
> form-factor determined parameters in order to maximize frequency while
> keeping the temperature way below the junction temperature where the SoC
> would experience a thermal shutdown if not permanent damages.
> 
> On the other side, the High Level Ooperating System (HLOS), like Linux,
> is able to adjust the CPU and GPU frequency using the internal SoC
> temperature sensors (here tsens) and it's UP/LOW interrupts, but it
> effectly does the same work twice for CPU in an less effective manner.
> 
> [...]

Applied, thanks!

[1/4] arm64: dts: qcom: sm8650: drop cpu thermal passive trip points
      commit: 7f9a670396029116424a803d3971ff0e552ff0b3
[2/4] arm64: dts: qcom: sm8650: setup gpu thermal with higher temperatures
      commit: 2250f65b32565eb8b757e89248c75977f370f498
[3/4] arm64: dts: qcom: sm8650: harmonize all unregulated thermal trip points
      commit: c516beb248a96f5a93fb4f9a6cb0dda4155eadbb
[4/4] arm64: dts: qcom: sm8650: drop remaining polling-delay-passive properties
      commit: 30235bb8b0487537ddd7dd4a480c907add6cd19b

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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