linux-kernel - Re: [PATCH 2/6] x86/msr-index: Define MSR index and bit for the microcode staging feature

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Message-ID: <20250226171923.GMZ79NG_8wDtZ8vyWH@fat_crate.local>
Date: Wed, 26 Feb 2025 18:19:23 +0100
From: Borislav Petkov <bp@...en8.de>
To: "Chang S. Bae" <chang.seok.bae@...el.com>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org, tglx@...utronix.de,
	mingo@...hat.com, dave.hansen@...ux.intel.com
Subject: Re: [PATCH 2/6] x86/msr-index: Define MSR index and bit for the
 microcode staging feature

On Tue, Dec 10, 2024 at 05:42:08PM -0800, Chang S. Bae wrote:
> The microcode staging feature involves two key MSR entities, the
> presence of which is indicated by bit 16 of IA32_ARCH_CAPABILITIES:
> 
> * Bit 4 in IA32_MCU_ENUMERATION shows the availability of the microcode
>   staging feature.
> 
> * Staging is managed through MMIO registers, with
>   IA32_MCU_STAGING_MBOX_ADDR MSR specifying the physical address of the
>   first MMIO register.
> 
> Define the MSR index and bit assignments, helping the upcoming staging
> code to make use of the hardware feature.
> 
> Signed-off-by: Chang S. Bae <chang.seok.bae@...el.com>
> ---
>  arch/x86/include/asm/msr-index.h | 9 +++++++++
>  1 file changed, 9 insertions(+)

Merge this patch with the patch where those MSR bits are used - no need for
a separate one.

-- 
Regards/Gruss,
    Boris.

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