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Message-ID: <059ba03a-a892-6a68-6000-c7db3dd6cf9c@amd.com>
Date: Wed, 26 Feb 2025 11:36:23 -0600
From: Tom Lendacky <thomas.lendacky@....com>
To: Rik van Riel <riel@...riel.com>, Borislav Petkov <bp@...en8.de>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org, peterz@...radead.org,
dave.hansen@...ux.intel.com, zhengqi.arch@...edance.com,
nadav.amit@...il.com, kernel-team@...a.com, linux-mm@...ck.org,
akpm@...ux-foundation.org, jackmanb@...gle.com, jannh@...gle.com,
mhklinux@...look.com, andrew.cooper3@...rix.com, Manali.Shukla@....com,
mingo@...nel.org
Subject: Re: [PATCH v13 06/14] x86/mm: use broadcast TLB flushing for page
reclaim TLB flushing
On 2/26/25 11:02, Rik van Riel wrote:
> On Wed, 2025-02-26 at 11:00 -0600, Tom Lendacky wrote:
>> On 2/25/25 15:03, Borislav Petkov wrote:
>>> On Tue, Feb 25, 2025 at 09:38:03PM +0100, Borislav Petkov wrote:
>>>> On Tue, Feb 25, 2025 at 02:17:20PM -0500, Rik van Riel wrote:
>>>>> Who do we need to ask to confirm that reading?
>>>>
>>>> Lemme figure it out.
>>>
>>> Confirmed - that really is the case.
>>
>> Hmmm... since this is for host/hypervisor TLB handling, this makes me
>> think that we should always be setting the ASID valid bit with 0 for
>> the
>> ASID value in EDX[15:0] on all INVLPGB instructions in this series.
>> Otherwise we will also be flushing any guest ASID TLB entries that
>> match
>> the conditions, when that isn't intended.
>
> The ASID is always zero in this series.
>
> We only ever use the PCID for address space identification.
Right, but the ASID valid bit is not set, so the flushing may match more
than just host/hypervisor TLB entries.
Thanks,
Tom
>
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