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Message-ID: <137331ed-2f5c-47c4-99d9-e932673dca31@oss.qualcomm.com>
Date: Wed, 26 Feb 2025 18:55:11 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Maulik Shah <maulik.shah@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Jishnu Prakash <quic_jprakash@...cinc.com>,
Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>,
Taniya Das <quic_tdas@...cinc.com>,
Melody Olvera <quic_molvera@...cinc.com>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, quic_lsrao@...cinc.com
Subject: Re: [PATCH v2] arm64: dts: qcom: sm8750: Fix cluster hierarchy for
idle states
On 26.02.2025 7:51 AM, Maulik Shah wrote:
> SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
> cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
> and power domain in order to achieve complete domain sleep state.
>
> However only single cluster idle state is added mapping CPU 0-7 to the
> same power domain. Fix this by correctly mapping each CPU to respective
> cluster power domain and make cluster1 power domain use same domain idle
> state as cluster0 since both use same idle state parameters.
>
> Fixes: 068c3d3c83be ("arm64: dts: qcom: Add base SM8750 dtsi")
> Signed-off-by: Maulik Shah <maulik.shah@....qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Konrad
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