linux-kernel - Re: [PATCH v2 2/2] clk: sophgo: Add clock controller support for SG2044 SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <m724pjlil3ghmgfikfnyp4hu6iwd4fkcj2mnsbl4gzfufpmnov@lu4al3iqpfss>
Date: Wed, 26 Feb 2025 11:02:18 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Chen Wang <unicorn_wang@...look.com>, 
	Inochi Amaoto <inochiama@...il.com>, Michael Turquette <mturquette@...libre.com>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Inochi Amaoto <inochiama@...look.com>, 
	Richard Cochran <richardcochran@...il.com>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org, Yixun Lan <dlan@...too.org>, 
	Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v2 2/2] clk: sophgo: Add clock controller support for
 SG2044 SoC

On Wed, Feb 26, 2025 at 10:57:46AM +0800, Chen Wang wrote:
> 
> On 2025/2/4 16:44, Inochi Amaoto wrote:
> [......]
> > diff --git a/drivers/clk/sophgo/clk-sg2044.c b/drivers/clk/sophgo/clk-sg2044.c
> > new file mode 100644
> > index 000000000000..7185c11ea2a5
> > --- /dev/null
> > +++ b/drivers/clk/sophgo/clk-sg2044.c
> > @@ -0,0 +1,2271 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Sophgo SG2042 clock controller Driver
> > + *
> > + * Copyright (C) 2024 Inochi Amaoto <inochiama@...look.com>
> 
> I'm afraid you may need to use your new gmail emailbox address.
> 
> [......]
> 

OK, I will change it.

> > +static int sg2044_clk_probe(struct platform_device *pdev)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct sg2044_clk_ctrl *ctrl;
> > +	const struct sg2044_clk_desc_data *desc;
> > +	void __iomem *reg;
> > +	struct regmap *regmap;
> > +	u32 num_clks;
> > +
> > +	reg = devm_platform_ioremap_resource(pdev, 0);
> > +	if (IS_ERR(reg))
> > +		return PTR_ERR(reg);
> > +
> > +	regmap = syscon_regmap_lookup_by_compatible("sophgo,sg2044-top-syscon");
> 
> What's this? Do you miss some descritpion about dependency (in
> cover-letter?)
> 

It is just a generic syscon device in the device tree
(It only add compatiable string in syscon.yaml).
As the clock dts always require minimal dts to be
functional, I do not add a dependency for requesting
it.

> Others LGTM.
> 
> Reviewed-by: Chen Wang <unicorn_wang@...look.com>
> 
> Regards,
> 
> Chen
> 
> [......]
>