linux-kernel - Re: [PATCH] KVM: selftests: Wait mprotect_ro_done before write to RO in mmu_stress

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Message-ID: <Z76F7M7o3mVrQyX/@yzhao56-desk.sh.intel.com>
Date: Wed, 26 Feb 2025 11:09:32 +0800
From: Yan Zhao <yan.y.zhao@...el.com>
To: Sean Christopherson <seanjc@...gle.com>
CC: Rick P Edgecombe <rick.p.edgecombe@...el.com>, "kvm@...r.kernel.org"
	<kvm@...r.kernel.org>, "pbonzini@...hat.com" <pbonzini@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] KVM: selftests: Wait mprotect_ro_done before write to RO
 in mmu_stress_test

On Tue, Feb 25, 2025 at 06:20:02PM -0800, Sean Christopherson wrote:
> On Wed, Feb 26, 2025, Yan Zhao wrote:
> > On Tue, Feb 25, 2025 at 05:53:49PM -0800, Sean Christopherson wrote:
> > > On Tue, Feb 11, 2025, Rick P Edgecombe wrote:
> > > > On Tue, 2025-02-11 at 09:42 +0800, Yan Zhao wrote:
> > > > > > On the fix though, doesn't this remove the coverage of writing to a
> > > > > > region that is in the process of being made RO? I'm thinking about
> > > > > > warnings, etc that may trigger intermittently based on bugs with a race
> > > > > > component. I don't know if we could fix the test and still leave the
> > > > > > write while the "mprotect(PROT_READ) is underway". It seems to be
> > > > > > deliberate.
> > > > > Write before "mprotect(PROT_READ)" has been tested in stage 0.
> > > > > Not sure it's deliberate to test write in the process of being made RO.
> > > 
> > > Writing while VMAs are being made RO is 100% intended.  The goal is to stress
> > > KVM's interactions with the mmu_notifier, and to verify KVM delivers -EFAULT to
> > > userspace.
> > > 
> > > Something isn't quite right in the original analysis.  We need to drill down on
> > > that before change anything.
> > > 
> > > FWIW, I run this test frequently on large systems and have never observed failures.
> > Could you try adding CONFIG_LOCK_STAT=y?
> 
> Will do, though it'll probably be a few days before I can take a look.
No problem.

> > With this config, the failure rate is more than 90% in my SPR non-TDX machine,
> > and 20%~80% in my TDX machine.