linux-kernel - Re: [PATCH] clk: qcom: dispcc-sm8750: Drop incorrect CLK_SET_RATE

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Message-ID: <eaae8c47a4bc27d512c76d9f107f1e00.sboyd@kernel.org>
Date: Wed, 26 Feb 2025 15:54:48 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Bjorn Andersson <andersson@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, Michael Turquette <mturquette@...libre.com>, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: dispcc-sm8750: Drop incorrect CLK_SET_RATE_PARENT on byte intf parent

Quoting Krzysztof Kozlowski (2025-01-29 07:45:19)
> The parent of disp_cc_mdss_byte0_intf_clk clock should not propagate up
> the rates, because this messes up entire clock hierarchy when setting
> clock rates in MSM DSI driver.
> 
> The dsi_link_clk_set_rate_6g() first sets entire clock hierarchy rates
> via dev_pm_opp_set_rate() on byte clock and then sets individual clock
> rates, like pixel and byte_intf clocks, to proper frequencies.  Having
> CLK_SET_RATE_PARENT caused that entire tree was re-calced and the byte
> clock received halved frequency.  Drop CLK_SET_RATE_PARENT to fix this
> and align with SM8550 and SM8650.
> 
> Fixes: f1080d8dab0f ("clk: qcom: dispcc-sm8750: Add SM8750 Display clock controller")
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> 
> ---

Applied to clk-fixes