[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Z76b3lgScK2gbtnG@lstrano-desk.jf.intel.com>
Date: Tue, 25 Feb 2025 20:43:10 -0800
From: Matthew Brost <matthew.brost@...el.com>
To: <jeffbai@...c.io>
CC: Lucas De Marchi <lucas.demarchi@...el.com>, Thomas
Hellström <thomas.hellstrom@...ux.intel.com>, Rodrigo Vivi
<rodrigo.vivi@...el.com>, Maarten Lankhorst
<maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>, José Roberto de Souza
<jose.souza@...el.com>, Francois Dugast <francois.dugast@...el.com>, "Alan
Previn" <alan.previn.teres.alexis@...el.com>, Zhanjun Dong
<zhanjun.dong@...el.com>, Matt Roper <matthew.d.roper@...el.com>, "Mateusz
Naklicki" <mateusz.naklicki@...el.com>, Mauro Carvalho Chehab
<mauro.chehab@...ux.intel.com>, Zbigniew Kempczyński
<zbigniew.kempczynski@...el.com>, <intel-xe@...ts.freedesktop.org>,
<dri-devel@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>, "Kexy
Biscuit" <kexybiscuit@...c.io>, Shang Yatsen <429839446@...com>,
<stable@...r.kernel.org>, Haien Liang <27873200@...com>, Shirong Liu
<lsr1024@...com>, Haofeng Wu <s2600cw2@....com>
Subject: Re: [PATCH 5/5] drm/xe/query: use PAGE_SIZE as the minimum page
alignment
On Wed, Feb 26, 2025 at 10:00:22AM +0800, Mingcong Bai via B4 Relay wrote:
> From: Mingcong Bai <jeffbai@...c.io>
>
> As this component hooks into userspace API, it should be assumed that it
> will play well with non-4K/64K pages.
>
> Use `PAGE_SIZE' as the final reference for page alignment instead.
>
> Cc: stable@...r.kernel.org
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Fixes: 801989b08aff ("drm/xe/uapi: Make constant comments visible in kernel doc")
> Tested-by: Mingcong Bai <jeffbai@...c.io>
> Tested-by: Haien Liang <27873200@...com>
> Tested-by: Shirong Liu <lsr1024@...com>
> Tested-by: Haofeng Wu <s2600cw2@....com>
> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
> Co-developed-by: Shang Yatsen <429839446@...com>
> Signed-off-by: Shang Yatsen <429839446@...com>
> Signed-off-by: Mingcong Bai <jeffbai@...c.io>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> include/uapi/drm/xe_drm.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index c059639613f7b548c168f808b7b7b354f1cf3c94..8a017c526942d1f2b401e8b9a4244e6083d7b1e5 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -336,7 +336,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
> DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
> config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
> - xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
> + xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : PAGE_SIZE;
We should probably assert or build a bug somewhere to ensure SZ_64K >=
PAGE_SIZE for future-proofing. Otherwise, I think the patch makes sense.
One more comment below.
> config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
> config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
> xe_exec_queue_device_get_max_priority(xe);
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index f62689ca861a4673b885629460c11d6f3bc6523d..db7cf904926ebd6789a29d620161ac051e59f13f 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -394,7 +394,7 @@ struct drm_xe_query_mem_regions {
> * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device
> * has usable VRAM
> * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
> - * required by this device, typically SZ_4K or SZ_64K
> + * required by this device, typically PAGE_SIZE.
So I think the kernel doc needs bit more updating here, how about:
Minimal memory alignment required by this device and the CPU. The
minimum page size for the device is usually SZ_4K or SZ_64K, while for
the CPU, it is PAGE_SIZE. This value is calculated by
max(min_gpu_page_size, PAGE_SIZE). This alignment is enforced on
buffer object allocations and VM binds.
Again welcome others CC'd suggestion on this updated kernel doc.
Matt
> * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
> * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
> * available exec queue priority
>
> --
> 2.48.1
>
>
Powered by blists - more mailing lists