linux-kernel - Re: [PATCH] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states

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Message-ID: <1b1e6e6a-84ee-4884-826b-f092ab5f3cf3@oss.qualcomm.com>
Date: Wed, 26 Feb 2025 11:18:59 +0530
From: "Maulik Shah (mkshah)" <maulik.shah@....qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>,
        Jishnu Prakash <quic_jprakash@...cinc.com>,
        Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>,
        Taniya Das <quic_tdas@...cinc.com>,
        Melody Olvera <quic_molvera@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, quic_lsrao@...cinc.com
Subject: Re: [PATCH] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle
 states



On 2/22/2025 1:21 AM, Konrad Dybcio wrote:
> On 18.02.2025 7:58 AM, Maulik Shah wrote:
>> SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
>> cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
>> and power domain in order to achieve complete domain sleep state.
>>
>> However only single cluster idle state is added mapping CPU 0-7 to the
>> same power domain. Fix this by correctly mapping each CPU to respective
>> cluster power domain and add domain idle state for cluster1.
>>
>> Fixes: 068c3d3c83be ("arm64: dts: qcom: Add base SM8750 dtsi")
>> Signed-off-by: Maulik Shah <maulik.shah@....qualcomm.com>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8750.dtsi | 36 +++++++++++++++++++++++++-----------
>>  1 file changed, 25 insertions(+), 11 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>> index 3bbd7d18598ee0a3a0d5130c03a3166e1fc14d82..3af928be5b68b47988dd55f4add8e3712f07d5ab 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi
>> @@ -178,7 +178,15 @@ cluster1_c4: cpu-sleep-1 {
>>  		};
>>  
>>  		domain-idle-states {
>> -			cluster_cl5: cluster-sleep-0 {
>> +			cluster0_cl5: cluster-sleep-0 {
>> +				compatible = "domain-idle-state";
>> +				arm,psci-suspend-param = <0x01000054>;
>> +				entry-latency-us = <2150>;
>> +				exit-latency-us = <1983>;
>> +				min-residency-us = <9144>;
>> +			};
> 
> I don't think this is necessary, you should be gtg with just creating the
> new power domain for cluster 0/1 and pointing both to the same cluster idle
> state (unless they both need different latency numbers
> 

Sure, I will address this in v2.

Thanks,
Maulik

> Konrad