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Message-Id: <20250226061527.3031250-5-raag.jadav@intel.com>
Date: Wed, 26 Feb 2025 11:45:27 +0530
From: Raag Jadav <raag.jadav@...el.com>
To: lee@...nel.org,
giometti@...eenne.com,
gregkh@...uxfoundation.org,
andriy.shevchenko@...ux.intel.com,
raymond.tan@...el.com
Cc: linux-kernel@...r.kernel.org,
Raag Jadav <raag.jadav@...el.com>
Subject: [PATCH v1 4/4] mfd: intel-ehl: Introduce Intel Elkhart Lake PSE GPIO and TIO
Intel Elkhart Lake Programmable Service Engine (PSE) includes two PCI
devices that expose two different capabilities of GPIO and Timed I/O
as a single PCI function through shared MMIO.
Signed-off-by: Raag Jadav <raag.jadav@...el.com>
---
MAINTAINERS | 5 ++
drivers/mfd/Kconfig | 9 ++++
drivers/mfd/Makefile | 1 +
drivers/mfd/intel-ehl-gpio.c | 95 ++++++++++++++++++++++++++++++++++++
4 files changed, 110 insertions(+)
create mode 100644 drivers/mfd/intel-ehl-gpio.c
diff --git a/MAINTAINERS b/MAINTAINERS
index d4280facbe51..7e50a6892878 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11643,6 +11643,11 @@ F: drivers/gpio/gpio-sodaville.c
F: drivers/gpio/gpio-tangier.c
F: drivers/gpio/gpio-tangier.h
+INTEL GPIO MFD DRIVER
+M: Raag Jadav <raag.jadav@...el.com>
+S: Supported
+F: drivers/mfd/intel-ehl-gpio.c
+
INTEL GVT-g DRIVERS (Intel GPU Virtualization)
M: Zhenyu Wang <zhenyuw@...ux.intel.com>
M: Zhi Wang <zhi.wang.linux@...il.com>
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 6b0682af6e32..8ba3db736a8f 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -609,6 +609,15 @@ config MFD_INTEL_QUARK_I2C_GPIO
their respective IO driver.
The GPIO exports a total amount of 8 interrupt-capable GPIOs.
+config MFD_INTEL_EHL_PSE_GPIO
+ tristate "Intel Elkhart Lake PSE GPIO MFD"
+ depends on PCI && (X86 || COMPILE_TEST)
+ select MFD_CORE
+ help
+ This MFD provides support for GPIO and TIO that exist on Intel
+ Elkhart Lake PSE as a single PCI device. It splits the two I/O
+ devices to their respective I/O drivers.
+
config LPC_ICH
tristate "Intel ICH LPC"
depends on PCI
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 9220eaf7cf12..bf7245fb6824 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -197,6 +197,7 @@ obj-$(CONFIG_PMIC_ADP5520) += adp5520.o
obj-$(CONFIG_MFD_ADP5585) += adp5585.o
obj-$(CONFIG_MFD_KEMPLD) += kempld-core.o
obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o
+obj-$(CONFIG_MFD_INTEL_EHL_PSE_GPIO) += intel-ehl-gpio.o
obj-$(CONFIG_LPC_SCH) += lpc_sch.o
obj-$(CONFIG_LPC_ICH) += lpc_ich.o
obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o
diff --git a/drivers/mfd/intel-ehl-gpio.c b/drivers/mfd/intel-ehl-gpio.c
new file mode 100644
index 000000000000..039c74c64848
--- /dev/null
+++ b/drivers/mfd/intel-ehl-gpio.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Intel Multi-Functional driver for Elkhart Lake - Programmable
+ * Service Engine (PSE) GPIO & TIO
+ *
+ * Copyright (c) 2025 Intel Corporation
+ *
+ * Intel Elkhart Lake PSE includes two PCI devices that expose two
+ * different capabilities of GPIO and Timed I/O as a single PCI
+ * function through shared MMIO.
+ */
+
+#include <linux/array_size.h>
+#include <linux/ioport.h>
+#include <linux/mfd/core.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+
+#define PSE_GPIO_OFFSET 0x0000
+#define PSE_GPIO_SIZE 0x0134
+
+#define PSE_TIO_OFFSET 0x1000
+#define PSE_TIO_SIZE 0x06B0
+
+static struct resource ehl_pse_gpio_resources[] = {
+ DEFINE_RES_MEM(PSE_GPIO_OFFSET, PSE_GPIO_SIZE),
+ DEFINE_RES_IRQ(0),
+};
+
+static struct resource ehl_pse_tio_resources[] = {
+ DEFINE_RES_MEM(PSE_TIO_OFFSET, PSE_TIO_SIZE),
+ DEFINE_RES_IRQ(1),
+};
+
+static struct mfd_cell ehl_pse_gpio_devs[] = {
+ {
+ .name = "gpio-elkhartlake",
+ .num_resources = ARRAY_SIZE(ehl_pse_gpio_resources),
+ .resources = ehl_pse_gpio_resources,
+ .ignore_resource_conflicts = true,
+ },
+ {
+ .name = "pps-gen-tio",
+ .num_resources = ARRAY_SIZE(ehl_pse_tio_resources),
+ .resources = ehl_pse_tio_resources,
+ .ignore_resource_conflicts = true,
+ },
+};
+
+static int ehl_pse_gpio_probe(struct pci_dev *pci, const struct pci_device_id *id)
+{
+ int ret;
+
+ ret = pcim_enable_device(pci);
+ if (ret)
+ return ret;
+
+ pci_set_master(pci);
+
+ ret = pci_alloc_irq_vectors(pci, 2, 2, PCI_IRQ_ALL_TYPES);
+ if (ret < 0)
+ return ret;
+
+ return mfd_add_devices(&pci->dev, PLATFORM_DEVID_AUTO, ehl_pse_gpio_devs,
+ ARRAY_SIZE(ehl_pse_gpio_devs), &pci->resource[0],
+ pci_irq_vector(pci, 0), NULL);
+}
+
+static void ehl_pse_gpio_remove(struct pci_dev *pdev)
+{
+ mfd_remove_devices(&pdev->dev);
+ pci_free_irq_vectors(pdev);
+}
+
+static const struct pci_device_id ehl_pse_gpio_ids[] = {
+ { PCI_VDEVICE(INTEL, 0x4b88) },
+ { PCI_VDEVICE(INTEL, 0x4b89) },
+ {}
+};
+MODULE_DEVICE_TABLE(pci, ehl_pse_gpio_ids);
+
+static struct pci_driver ehl_pse_gpio_driver = {
+ .probe = ehl_pse_gpio_probe,
+ .remove = ehl_pse_gpio_remove,
+ .id_table = ehl_pse_gpio_ids,
+ .name = "ehl_pse_gpio",
+};
+module_pci_driver(ehl_pse_gpio_driver);
+
+MODULE_AUTHOR("Raymond Tan <raymond.tan@...el.com>");
+MODULE_AUTHOR("Raag Jadav <raag.jadav@...el.com>");
+MODULE_DESCRIPTION("Intel MFD for Elkhart Lake PSE GPIO & TIO");
+MODULE_LICENSE("GPL");
--
2.34.1
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