linux-kernel - [PATCH v1 2/6] ARM: tegra114: switch DSI-B clock parent to PLLD

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Message-ID: <20250226105615.61087-3-clamor95@gmail.com>
Date: Wed, 26 Feb 2025 12:56:11 +0200
From: Svyatoslav Ryhel <clamor95@...il.com>
To: Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Thierry Reding <thierry.reding@...il.com>,
	Jonathan Hunter <jonathanh@...dia.com>,
	Svyatoslav Ryhel <clamor95@...il.com>
Cc: devicetree@...r.kernel.org,
	linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v1 2/6] ARM: tegra114: switch DSI-B clock parent to PLLD

PLLD is usually used as parent clock for internal video devices, like DSI
for example, while PLLD2 is used as parent for HDMI.

Signed-off-by: Svyatoslav Ryhel <clamor95@...il.com>
---
 arch/arm/boot/dts/nvidia/tegra114.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi
index 4365daee2f3a..62d4a2bbde0e 100644
--- a/arch/arm/boot/dts/nvidia/tegra114.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi
@@ -178,7 +178,7 @@ dsib: dsi@...00000 {
 			reg = <0x54400000 0x00040000>;
 			clocks = <&tegra_car TEGRA114_CLK_DSIB>,
 				 <&tegra_car TEGRA114_CLK_DSIBLP>,
-				 <&tegra_car TEGRA114_CLK_PLL_D2_OUT0>;
+				 <&tegra_car TEGRA114_CLK_PLL_D_OUT0>;
 			clock-names = "dsi", "lp", "parent";
 			resets = <&tegra_car 82>;
 			reset-names = "dsi";
-- 
2.43.0