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Message-ID: <bb9a1614-4702-4b3f-a22d-07402426569a@quicinc.com>
Date: Wed, 26 Feb 2025 19:01:31 +0800
From: Yuanfang Zhang <quic_yuanfang@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Suzuki K Poulose
<suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark
<james.clark@...aro.org>,
Alexander Shishkin
<alexander.shishkin@...ux.intel.com>
CC: <kernel@...cinc.com>, <linux-kernel@...r.kernel.org>,
<coresight@...ts.linaro.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 1/5] dt-bindings: arm: Add Coresight device Trace NOC
definition
On 2/20/2025 8:25 PM, Krzysztof Kozlowski wrote:
> On 20/02/2025 10:41, Yuanfang Zhang wrote:
>> Adds new coresight-tnoc.yaml file describing the bindings required
>> to define Trace NOC in the device trees.
>>
>> Signed-off-by: Yuanfang Zhang <quic_yuanfang@...cinc.com>
>
> <form letter>
> Please use scripts/get_maintainers.pl to get a list of necessary people
> and lists to CC. It might happen, that command when run on an older
> kernel, gives you outdated entries. Therefore please be sure you base
> your patches on recent Linux kernel.
>
> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
> people, so fix your workflow. Tools might also fail if you work on some
> ancient tree (don't, instead use mainline) or work on fork of kernel
> (don't, instead use mainline). Just use b4 and everything should be
> fine, although remember about `b4 prep --auto-to-cc` if you added new
> patches to the patchset.
>
> You missed at least devicetree list (maybe more), so this won't be
> tested by automated tooling. Performing review on untested code might be
> a waste of time.
>
> Please kindly resend and include all necessary To/Cc entries.
> </form letter>
>
updated in https://lore.kernel.org/r/20250221-trace-noc-driver-v1-0-0a23fc643217@quicinc.com
>> ---
>> .../bindings/arm/qcom,coresight-tnoc.yaml | 107 +++++++++++++++++++++
>> 1 file changed, 107 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..b8c1aaf014fb483fd960ec55d1193fb3f66136d2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml
>> @@ -0,0 +1,107 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/qcom,coresight-tnoc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Ttrace NOC(Network On Chip)
>> +
>> +maintainers:
>> + - yuanfang Zhang <quic_yuanfang@...cinc.com>
>> +
>> +description:
>> + The Trace NoC is an integration hierarchy which is a replacement of Dragonlink tile configuration.
>> + It brings together debug component like TPDA, funnel and interconnect Trace Noc which collects trace
>
> Wrap according to coding style.
>
Done in V2.
>> + from subsystems and transfers to QDSS sink.
>> +
>> + It sits in the different subsystem of SOC and aggregates the trace and transports it to Aggregation TNoC
>> + or to QDSS trace sink eventually. Trace NoC embeds bridges for all the interfaces(APB, ATB, QPMDA & NTS).
>> +
>> + Trace NoC can take inputs from different trace sources i.e. ATB, QPMDA.
>> +
>> +# Need a custom select here or 'arm,primecell' will match on lots of nodes
>> +select:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - qcom,coresight-tnoc
>> + required:
>> + - compatible
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^tn(@[0-9a-f]+)$"
>> + compatible:
>> + items:
>> + - const: qcom,coresight-tnoc
>> + - const: arm,primecell
>> +
>> + reg:
>> + minItems: 1
>> + maxItems: 2
>
> Look how existing bindings do it. You need to list and describe the items.
>
Done in V2.
> Best regards,
> Krzysztof
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