[<prev] [next>] [day] [month] [year] [list]
Message-ID: <174056784278.10177.5669846418937512319.tip-bot2@tip-bot2>
Date: Wed, 26 Feb 2025 11:04:02 -0000
From: "tip-bot2 for Biju Das" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Biju Das <biju.das.jz@...renesas.com>,
Thomas Gleixner <tglx@...utronix.de>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Tommaso Merciai <tommaso.merciai.xr@...renesas.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
"Rob Herring (Arm)" <robh@...nel.org>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: irq/drivers] dt-bindings: interrupt-controller:
renesas,rzv2h-icu: Document RZ/G3E SoC
The following commit has been merged into the irq/drivers branch of tip:
Commit-ID: 9d245214b683e9e4fe2d5c588691337b22c48841
Gitweb: https://git.kernel.org/tip/9d245214b683e9e4fe2d5c588691337b22c48841
Author: Biju Das <biju.das.jz@...renesas.com>
AuthorDate: Mon, 24 Feb 2025 13:11:17
Committer: Thomas Gleixner <tglx@...utronix.de>
CommitterDate: Wed, 26 Feb 2025 11:59:49 +01:00
dt-bindings: interrupt-controller: renesas,rzv2h-icu: Document RZ/G3E SoC
Document RZ/G3E (R9A09G047) ICU bindings. The ICU block on the RZ/G3E
SoC is almost identical to the one found on the RZ/V2H SoC, with the
following differences:
- The TINT register base offset is 0x800 instead of zero.
- The number of supported GPIO interrupts for TINT selection is 141
instead of 86.
- The pin index and TINT selection index are not in the 1:1 map
- The number of TSSR registers is 16 instead of 8
- Each TSSR register can program 2 TINTs instead of 4 TINTs
Hence add the new compatible string "renesas,r9a09g047-icu" for RZ/G3E SoC.
Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Acked-by: Rob Herring (Arm) <robh@...nel.org>
Link: https://lore.kernel.org/all/20250224131253.134199-2-biju.das.jz@bp.renesas.com
---
Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml
index d7ef4f1..3f99c86 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Renesas RZ/V2H(P) Interrupt Control Unit
+title: Renesas RZ/{G3E,V2H(P)} Interrupt Control Unit
maintainers:
- Fabrizio Castro <fabrizio.castro.jz@...esas.com>
@@ -20,7 +20,9 @@ description:
properties:
compatible:
- const: renesas,r9a09g057-icu # RZ/V2H(P)
+ enum:
+ - renesas,r9a09g047-icu # RZ/G3E
+ - renesas,r9a09g057-icu # RZ/V2H(P)
'#interrupt-cells':
description: The first cell is the SPI number of the NMI or the
Powered by blists - more mailing lists