linux-kernel - [RFC PATCH v1 07/10] riscv: Add RISC-V entries in processor type and ISA strings

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Message-ID: <20250227123628.2931490-8-hchauhan@ventanamicro.com>
Date: Thu, 27 Feb 2025 18:06:25 +0530
From: Himanshu Chauhan <hchauhan@...tanamicro.com>
To: linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-acpi@...r.kernel.org,
	linux-efi@...r.kernel.org,
	acpica-devel@...ts.linux.dev
Cc: paul.walmsley@...ive.com,
	palmer@...belt.com,
	lenb@...nel.org,
	james.morse@....com,
	tony.luck@...el.com,
	ardb@...nel.org,
	conor@...nel.org,
	cleger@...osinc.com,
	robert.moore@...el.com,
	sunilvl@...tanamicro.com,
	apatel@...tanamicro.com,
	Himanshu Chauhan <hchauhan@...tanamicro.com>
Subject: [RFC PATCH v1 07/10] riscv: Add RISC-V entries in processor type and ISA strings

- Add RISCV in processor type
- Add RISCV32/64 in ISA

Signed-off-by: Himanshu Chauhan <hchauhan@...tanamicro.com>
---
 drivers/firmware/efi/cper.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c
index b69e68ef3f02..f2908296a48f 100644
--- a/drivers/firmware/efi/cper.c
+++ b/drivers/firmware/efi/cper.c
@@ -110,6 +110,7 @@ static const char * const proc_type_strs[] = {
 	"IA32/X64",
 	"IA64",
 	"ARM",
+	"RISCV",
 };
 
 static const char * const proc_isa_strs[] = {
@@ -118,6 +119,8 @@ static const char * const proc_isa_strs[] = {
 	"X64",
 	"ARM A32/T32",
 	"ARM A64",
+	"RISCV32",
+	"RISCV64",
 };
 
 const char * const cper_proc_error_type_strs[] = {
-- 
2.43.0