linux-kernel - Re: [PATCH v2 1/2] arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions

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Message-ID: <fdlsw6mctzfutashmlve7eubgbx6nfzwsft2mnslmgsdrrwuve@pudlwja2y6g5>
Date: Thu, 27 Feb 2025 17:11:32 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Neil Armstrong <neil.armstrong@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>, 
	Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: sm8650: switch to
 interrupt-cells 4 to add PPI partitions

On Thu, Feb 27, 2025 at 10:04:39AM +0100, Neil Armstrong wrote:
> The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch
> to interrupt-cells = <4> in the GIC node to allow adding an interrupt
> partition map phandle as the 4th cell value for GIC_PPI interrupts.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 542 +++++++++++++++++------------------
>  1 file changed, 271 insertions(+), 271 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index de960bcaf3ccf6e2be47bf63a02effbfb75241bf..273170a2e9499b900b3348307f13c9bc1a9a7345 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -1417,17 +1417,17 @@ opp-3302400000 {
>  
>  	pmu-a520 {
>  		compatible = "arm,cortex-a520-pmu";
> -		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH 0>;

Why are you changing the interrupt type? Should that be coming as a part
of the next patch?

>  	};
>  
>  	pmu-a720 {
>  		compatible = "arm,cortex-a720-pmu";
> -		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH 0>;
>  	};
>  
>  	pmu-x4 {
>  		compatible = "arm,cortex-x4-pmu";
> -		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
> +		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH 0>;
>  	};
>  
>  	psci {

-- 
With best wishes
Dmitry