linux-kernel - Re: [PATCH] RFC: ptp: add comment about register access race

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <Z8CDhIN5vhcSm1ge@smile.fi.intel.com>
Date: Thu, 27 Feb 2025 17:23:48 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Arnd Bergmann <arnd@...nel.org>
Cc: Richard Cochran <richardcochran@...il.com>,
	Thomas Weißschuh <thomas.weissschuh@...utronix.de>,
	Arnd Bergmann <arnd@...db.de>, Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Tianfei Zhang <tianfei.zhang@...el.com>,
	Jonathan Lemon <jonathan.lemon@...il.com>,
	Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Thomas Weißschuh <linux@...ssschuh.net>,
	Calvin Owens <calvin@...nvd.org>,
	Philipp Stanner <pstanner@...hat.com>, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-fpga@...r.kernel.org
Subject: Re: [PATCH] RFC: ptp: add comment about register access race

On Thu, Feb 27, 2025 at 03:17:27PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann <arnd@...db.de>
> 
> While reviewing a patch to the ioread64_hi_lo() helpers, I noticed
> that there are several PTP drivers that use multiple register reads
> to access a 64-bit hardware register in a racy way.
> 
> There are usually safe ways of doing this, but at least these four
> drivers do that.  A third register read obviously makes the hardware
> access 50% slower. If the low word counds nanoseconds and a single
> register read takes on the order of 1µs, the resulting value is
> wrong in one of 4 million cases, which is pretty rare but common
> enough that it would be observed in practice.

...

> Sorry I hadn't sent this out as a proper patch so far. Any ideas
> what we should do here?

Actually this reminds me one of the discussion where it was some interesting
HW design that latches the value on the first read of _low_ part (IIRC), but
I might be mistaken with the details.

That said, it's from HW to HW, it might be race-less in some cases.

-- 
With Best Regards,
Andy Shevchenko