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Message-ID: <cover.1740671156.git.Ryan.Wanner@microchip.com>
Date: Thu, 27 Feb 2025 08:51:47 -0700
From: <Ryan.Wanner@...rochip.com>
To: <lee@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <claudiu.beznea@...on.dev>, <sre@...nel.org>,
<nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<p.zabel@...gutronix.de>
CC: <linux@...linux.org.uk>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-rtc@...r.kernel.org>, "Ryan
Wanner" <Ryan.Wanner@...rochip.com>
Subject: [PATCH v3 00/21] Enable Power Modes Support for SAMA7D65 SoC
From: Ryan Wanner <Ryan.Wanner@...rochip.com>
This patch set adds support for low power modes for the SAMA7D65 SoC and
the required components and changes for low power modes.
The series includes changes in the asm code to account for the addtional
clocks that are in this SoC.
The Device tree additions are to enable all the components needed to
keep the SoC in low power mode.
There are some DTB check warnings but that is due to the dt-binding not
in the correct .yaml file format.
Changes v1 -> v2:
- Add missing compatible for ddr3phy, it is now in both syscon sets.
- Fix alphabetical ordering for sama7d65.
- Remove the incorrect reorganizing patch.
- Remove sama7g5-rtt as a compatible for sama7d65-rtt and add
sama7d65-rtt as a compatible wake up source in the pm driver.
Changes from v2 -> v3:
- Correct mistake in v2 sfrbu dt-binding patch.
- Correct incorrect dt-binding addition and formatting for rtc and rtt bindings.
- Add missing SoB tag.
- Cleaned up commit message for Backup mode to describe SHDWC is status
register is cleared for this SoC.
- Cleaned up variable naming and usage for mcks. Changed the mcks number
to the correct number of clocks needed to be saved and corrected the
ASM code accordingly.
- Removed the SHDWC from ULP0 wake-up source as it is not configured as
a valid wake-up source for ULP0.
- Separated all the DTSI and DTS changes into individual patches.
Li Bin (1):
ARM: at91: pm: fix at91_suspend_finish for ZQ calibration
Ryan Wanner (20):
dt-bindings: mfd: syscon: add microchip,sama7d65-ddr3phy
dt-bindings: mfd: syscon: add microchip,sama7d65-sfrbu
dt-bindings: sram: Add microchip,sama7d65-sram
dt-bindings: power: reset: atmel,sama5d2-shdwc: Add
microchip,sama7d65-shdwc
dt-bindings: reset: atmel,at91sam9260-reset: add
microchip,sama7d65-rstc
dt-bindings: rtc: at91rm9200: add microchip,sama7d65-rtc
dt-bindings: at91rm9260-rtt: add microchip,sama7d65-rtt
ARM: at91: Add PM support to sama7d65
ARM: at91: pm: add DT compatible support for sama7d65
ARM: at91: PM: Add Backup mode for SAMA7D65
ARM: at91: pm: Enable ULP0/ULP1 for SAMA7D65
power: reset: at91-sama5d2_shdwc: Add sama7d65 PMC
ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
ARM: dts: microchip: sama7d65: Add Reset Controller to sama7d65 SoC
ARM: dts: microchip: sama7d65: Add Shutdown controller support
ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65
SoC
ARM: dts: microchip: sama7d65: Add RTC support for sama7d65
ARM: dts: microchip: sama7d65: Add SFRBU support to sama7d65
ARM: dts: microchip: sama7d65: Enable shutdown controller
ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
.../devicetree/bindings/mfd/syscon.yaml | 4 +
.../power/reset/atmel,sama5d2-shdwc.yaml | 5 +
.../reset/atmel,at91sam9260-reset.yaml | 3 +
.../bindings/rtc/atmel,at91rm9200-rtc.yaml | 4 +-
.../bindings/rtc/atmel,at91sam9260-rtt.yaml | 1 +
.../devicetree/bindings/sram/sram.yaml | 1 +
.../dts/microchip/at91-sama7d65_curiosity.dts | 13 +++
arch/arm/boot/dts/microchip/sama7d65.dtsi | 77 +++++++++++++
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/pm.c | 47 +++++---
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_data-offsets.c | 2 +
arch/arm/mach-at91/pm_suspend.S | 101 ++++++++++++++++--
drivers/power/reset/at91-sama5d2_shdwc.c | 1 +
14 files changed, 238 insertions(+), 23 deletions(-)
--
2.43.0
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