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Message-ID: <7535057b-b6fc-4831-ac5b-b68903083747@oss.qualcomm.com>
Date: Thu, 27 Feb 2025 18:50:31 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Neil Armstrong <neil.armstrong@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/3] arm64: dts: qcom: sm8650: fix PMU interrupt flag
On 27.02.2025 5:04 PM, Neil Armstrong wrote:
> The ARM PMU interrupt is sometimes defined as IRQ_TYPE_LEVEL_LOW,
> or IRQ_TYPE_LEVEL_HIGH, but downstream and recent platforms used the
> IRQ_TYPE_LEVEL_HIGH flag so align the SM8650 definition to have a
> functional PMU working.
>
> Fixes: c8a346e408cb ("arm64: dts: qcom: Split PMU nodes for heterogeneous CPUs")
> Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
I couldn't find anything to back this up, not inside, not on Arm's
website, but downstream agrees, so..
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Konrad
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