linux-kernel - [PATCH 2/2] arm64: dts: qcom: qcs8300: add QCrypto node

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Message-ID: <20250227180817.3386795-2-quic_yrangana@quicinc.com>
Date: Thu, 27 Feb 2025 23:38:17 +0530
From: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski
	<krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <quic_yrangana@...cinc.com>
Subject: [PATCH 2/2] arm64: dts: qcom: qcs8300: add QCrypto node

The initial QCE node change is reverted by the following patch
https://lore.kernel.org/all/20250128115333.95021-2-krzysztof.kozlowski@linaro.org/
because of the build warning,

  qcs8300-ride.dtb: crypto@...a000: compatible: 'oneOf' conditional failed, one must be fixed:
    ...
    'qcom,qcs8300-qce' is not one of ['qcom,ipq4019-qce', 'qcom,sm8150-qce']

1. ICE crypto node is not sorted and fix to sort it.
2. Add the QCE node back that fix the above warning.

Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@...cinc.com>
---
 arch/arm64/boot/dts/qcom/qcs8300.dtsi | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 13b1121cdf17..0ee0539a22e8 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -785,6 +785,13 @@ ufs_mem_phy: phy@...7000 {
 			status = "disabled";
 		};
 
+		ice: crypto@...8000 {
+			compatible = "qcom,qcs8300-inline-crypto-engine",
+				     "qcom,inline-crypto-engine";
+			reg = <0x0 0x01d88000 0x0 0x18000>;
+			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+		};
+
 		cryptobam: dma-controller@...4000 {
 			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
 			reg = <0x0 0x01dc4000 0x0 0x28000>;
@@ -798,11 +805,16 @@ cryptobam: dma-controller@...4000 {
 				 <&apps_smmu 0x481 0x00>;
 		};
 
-		ice: crypto@...8000 {
-			compatible = "qcom,qcs8300-inline-crypto-engine",
-				     "qcom,inline-crypto-engine";
-			reg = <0x0 0x01d88000 0x0 0x18000>;
-			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
+		crypto: crypto@...a000 {
+			compatible = "qcom,qcs8300-qce", "qcom,sm8150-qce", "qcom,qce";
+			reg = <0x0 0x01dfa000 0x0 0x6000>;
+			dmas = <&cryptobam 4>, <&cryptobam 5>;
+			dma-names = "rx", "tx";
+			iommus = <&apps_smmu 0x480 0x00>,
+				 <&apps_smmu 0x481 0x00>;
+			interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 QCOM_ICC_TAG_ALWAYS
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+			interconnect-names = "memory";
 		};
 
 		tcsr_mutex: hwlock@...0000 {
-- 
2.34.1