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Message-ID: <Z8DACBJUqZ8WwgpO@gmail.com>
Date: Thu, 27 Feb 2025 20:42:00 +0100
From: Ingo Molnar <mingo@...nel.org>
To: Andrew Cooper <andrew.cooper3@...rix.com>
Cc: dave.hansen@...el.com, bp@...en8.de, chang.seok.bae@...el.com,
dave.hansen@...ux.intel.com, linux-kernel@...r.kernel.org,
mingo@...hat.com, tglx@...utronix.de, x86@...nel.org
Subject: Re: [PATCH RFC v1 02/11] x86/fpu/xstate: Introduce xstate order
table and accessor macro
* Andrew Cooper <andrew.cooper3@...rix.com> wrote:
> On 2/27/25 19:03, Dave Hansen wrote:
>
> > On 2/27/25 10:44, Chang S. Bae wrote:
> >> The kernel has largely assumed that higher xstate component numbers
> >> correspond to later offsets in the buffer. However, this assumption
> >> does not hold for the non-compacted format, where a newer state
> >> component may have a lower offset.
> > Maybe "no longer holds" instead of "does not hold".
> >
> > This never happened before APX, right?
>
> I'm afraid that AMD beat you there by a decade with LWP, index 63 but
> also overlaps the MPX state.
https://giphy.com/gifs/moodman-TJawtKM6OCKkvwCIqX
> Except LWP support never became mainstream, and it also got
> sacrificed to make room for IBPB in microcode, so you can safely
> ignore it[1].
yay! CPU makers always chose the right solution, once they have
exhaused all the alternatives.
Thanks,
Ingo
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