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Message-ID: <4c71fc86-2d70-4d50-b041-d6ef8c1baf4c@intel.com>
Date: Thu, 27 Feb 2025 12:19:05 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Ingo Molnar <mingo@...nel.org>
Cc: "Chang S. Bae" <chang.seok.bae@...el.com>, linux-kernel@...r.kernel.org,
x86@...nel.org, tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
dave.hansen@...ux.intel.com, Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH RFC v1 02/11] x86/fpu/xstate: Introduce xstate order table
and accessor macro
On 2/27/25 12:02, Ingo Molnar wrote:
>>> There's a 4th option:
>>>
>>> 4. Reuse XFEATURES 3/4 (MPX) only on APX-aware kernels, keep it
>>> disabled for old kernels.
>>>
>>> Problem solved.
>> The worry boils down to code in the kernel or userspace doing this:
>>
>> if (XGETBV(0) & 0x11)
>> do_mpx_gunk();
> New, APX-aware kernels wouldn't be doing this, why would they?
New, updated software is rarely the problem. It would not be a problem
in this case either.
The problem is with old OSes/VMMs and even old userspace on new kernels.
XGETBV() is unprivileged, so the concern extends to userspace and kernel.
>> So, sure, we could try to make sure that new kernels don't have any
>> do_mpx_gunk() in them, but that doesn't help old kernels or other
>> OSes/VMMs.
> Old kernels would *never* see this bit enabled if it's disabled by
> default on bootup ...
>
> VMMs would boot with it default-disabled as well, they can enable it
> themselves.
The problem is with code which is logically like this:
cpuid_count(CPUID_LEAF_XSTATE, 0, &eax, &ebx, &ecx, &edx);
fpu_kernel_cfg.max_features = eax + ((u64)edx << 32);
fpu_kernel_cfg.max_features &= SUPPORTED_FEATURE_MASK;
xsetbv(fpu_kernel_cfg.max_features);
In that code, the kernel asks the CPU which features it supports and
then it enables all those features. In an old kernel,
SUPPORTED_FEATURE_MASK would contain the two MPX XFEATURES.
So I'm not _quite_ sure what you meant when you said:
> Old kernels would *never* see this bit enabled if it's disabled by
> default on bootup ...
Because old kernel very much do see the MPX bits in CPUID and very much
do enable them by default via XSETBV.
But I suspect I'm misunderstanding what you mean by "this bit" in first
place. Could you explain in some more detail, please?
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