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Message-ID: <20250228-shampoo-uprising-44ae0d3bd68b@spud>
Date: Fri, 28 Feb 2025 19:03:05 +0000
From: Conor Dooley <conor@...nel.org>
To: John Madieu <john.madieu.xa@...renesas.com>
Cc: geert+renesas@...der.be, magnus.damm@...il.com, mturquette@...libre.com,
sboyd@...nel.org, rafael@...nel.org, daniel.lezcano@...aro.org,
rui.zhang@...el.com, lukasz.luba@....com, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, p.zabel@...gutronix.de,
catalin.marinas@....com, will@...nel.org, john.madieu@...il.com,
linux-renesas-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
biju.das.jz@...renesas.com
Subject: Re: [PATCH v2 3/7] dt-bindings: thermal: r9a09g047-tsu: Document the
TSU unit
On Thu, Feb 27, 2025 at 01:24:39PM +0100, John Madieu wrote:
> The Renesas RZ/G3E SoC includes a Thermal Sensor Unit (TSU) block designed
> to measure the junction temperature. The device provides real-time temperature
> measurements for thermal management, utilizing a single dedicated channel
> (channel 1) for temperature sensing.
>
> Signed-off-by: John Madieu <john.madieu.xa@...renesas.com>
> ---
> v1 -> v2:
> * Fix reg property specifier to get rid of yamlint warnings
> * Fix IRQ name to reflect TSU expectations
>
> .../thermal/renesas,r9a09g047-tsu.yaml | 123 ++++++++++++++++++
> 1 file changed, 123 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
>
> diff --git a/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
> new file mode 100644
> index 000000000000..e786561ddbe3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
> @@ -0,0 +1,123 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/thermal/renesas,r9a09g047-tsu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/G3E Temperature Sensor Unit (TSU)
> +
> +maintainers:
> + - John Madieu <john.madieu.xa@...renesas.com>
> +
> +description:
> + The Temperature Sensor Unit (TSU) is an integrated thermal sensor that
> + monitors the chip temperature on the Renesas RZ/G3E SoC. The TSU provides
> + real-time temperature measurements for thermal management.
> +
> +properties:
> + compatible:
> + const: renesas,r9a09g047-tsu
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + interrupts:
> + description: |
> + Interrupt specifiers for the TSU:
> + - S12TSUADI1: Conversion complete interrupt signal (pulse)
> + - S12TSUADCMPI1: Comparison result interrupt signal (level)
> +
> + interrupt-names:
> + items:
> + - const: adi
> + - const: adcmpi
> +
> + "#thermal-sensor-cells":
> + const: 0
> +
> + renesas,tsu-calibration-sys:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: |
> + Phandle to the system controller (sys) that contains the TSU
> + calibration values used for temperature calculations.
> +
> + renesas,tsu-operating-mode:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
> + description: |
> + TSU operating mode:
> + 0: Mode 0 - Conversion started by software
> + 1: Mode 1 - Conversion started by ELC trigger
Can you make this "software" and "elc" or something please, unless
people will genuinely find "0" and 1" to be more informative.
And why doesn't the property have a default?
cheers,
Conor.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> + - power-domains
> + - interrupts
> + - interrupt-names
> + - "#thermal-sensor-cells"
> + - renesas,tsu-operating-mode
> + - renesas,tsu-calibration-sys
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + tsu: thermal@...02000 {
> + compatible = "renesas,r9a09g047-tsu";
> + reg = <0x14002000 0x1000>;
> + clocks = <&cpg CPG_MOD 0x10a>;
> + resets = <&cpg 0xf8>;
> + power-domains = <&cpg>;
> + interrupts = <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "adi", "adcmpi";
> + #thermal-sensor-cells = <0>;
> + renesas,tsu-operating-mode = <0>;
> + renesas,tsu-calibration-sys = <&sys>;
> + };
> +
> + thermal-zones {
> + cpu-thermal {
> + polling-delay = <1000>;
> + polling-delay-passive = <250>;
> + thermal-sensors = <&tsu>;
> +
> + cooling-maps {
> + map0 {
> + trip = <&target>;
> + cooling-device = <&cpu0 0 3>, <&cpu1 0 3>,
> + <&cpu2 0 3>, <&cpu3 0 3>;
> + contribution = <1024>;
> + };
> + };
> +
> + trips {
> + target: trip-point {
> + temperature = <95000>;
> + hysteresis = <1000>;
> + type = "passive";
> + };
> +
> + sensor_crit: sensor-crit {
> + temperature = <120000>;
> + hysteresis = <1000>;
> + type = "critical";
> + };
> + };
> + };
> + };
> --
> 2.25.1
>
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