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Message-ID: <CACRpkdZP4u+LwhfRYnjhD6bkoBAG7AHX3SnF=5R8fc72BDradg@mail.gmail.com>
Date: Fri, 28 Feb 2025 09:42:50 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org
Subject: Re: [PATCH] pinctrl: qcom: Add test case for TLMM interrupt handling
On Thu, Feb 27, 2025 at 9:33 PM Bjorn Andersson
<bjorn.andersson@....qualcomm.com> wrote:
> While looking at the X1E PDC GPIO interrupts it became clear that we're
> lacking a convenient and accessible way to validate if the TLMM
> interrupt code performing as expected.
>
> This introduces a kunit-based "hack" that relies on pin bias/pull
> configuration to tickle the interrupt logic in non-connected pins to
> allow us to evaluate that an expected number of interrupts are
> delivered.
>
> The bias/pull configuration is done with mmio accesses directly from the
> test code, to avoid having to programmatically acquire and drive the
> pinconf interface for the test pin. This limits the scalability of the
> code to targets with a particular register layout, but serves our needs
> for now.
>
> The pin to be used for testing is specified by the tester using the
> "tlmm-test.gpio" module parameter.
>
> Worth mentioning is that some of the test cases currently fails for
> GPIOs that is not backed by PDC (i.e. "non-wakeup" GPIOs), as lingering
> latched interrupt state is being delivered at IRQ request time.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
That looks like a super dangerous footgun to shoot oneself in the
foot with.
But the usecase is 100% valid and I see why you need this.
Patch applied!
Yours,
Linus Walleij
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