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Message-ID: <CAMuHMdWzuNz_4LFtNtoiowq31b=wbA_9Qahj1f0EP-9Wq8X4Uw@mail.gmail.com>
Date: Fri, 28 Feb 2025 11:17:20 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc: Vinod Koul <vkoul@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>, Biju Das <biju.das.jz@...renesas.com>,
"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v4 3/7] dt-bindings: dma: rz-dmac: Document RZ/V2H(P)
family of SoCs
Hi Fabrizio,
On Thu, 27 Feb 2025 at 19:16, Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> > From: Geert Uytterhoeven <geert@...ux-m68k.org>
> > Sent: 24 February 2025 12:44
> > Subject: Re: [PATCH v4 3/7] dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs
> >
> > On Thu, 20 Feb 2025 at 16:01, Fabrizio Castro
> > <fabrizio.castro.jz@...esas.com> wrote:
> > > Document the Renesas RZ/V2H(P) family of SoCs DMAC block.
> > > The Renesas RZ/V2H(P) DMAC is very similar to the one found on the
> > > Renesas RZ/G2L family of SoCs, but there are some differences:
> > > * It only uses one register area
> > > * It only uses one clock
> > > * It only uses one reset
> > > * Instead of using MID/IRD it uses REQ NO/ACK NO
> > > * It is connected to the Interrupt Control Unit (ICU)
> > >
> > > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> >
> > > v1->v2:
> > > * Removed RZ/V2H DMAC example.
> > > * Improved the readability of the `if` statement.
> >
> > Thanks for the update!
> >
> > > --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> > > +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
> > > @@ -61,14 +66,22 @@ properties:
> > > '#dma-cells':
> > > const: 1
> > > description:
> > > - The cell specifies the encoded MID/RID values of the DMAC port
> > > - connected to the DMA client and the slave channel configuration
> > > - parameters.
> > > + For the RZ/A1H, RZ/Five, RZ/G2{L,LC,UL}, RZ/V2L, and RZ/G3S SoCs, the cell
> > > + specifies the encoded MID/RID values of the DMAC port connected to the
> > > + DMA client and the slave channel configuration parameters.
> > > bits[0:9] - Specifies MID/RID value
> > > bit[10] - Specifies DMA request high enable (HIEN)
> > > bit[11] - Specifies DMA request detection type (LVL)
> > > bits[12:14] - Specifies DMAACK output mode (AM)
> > > bit[15] - Specifies Transfer Mode (TM)
> > > + For the RZ/V2H(P) SoC the cell specifies the REQ NO, the ACK NO, and the
> > > + slave channel configuration parameters.
> > > + bits[0:9] - Specifies the REQ NO
> >
> > So REQ_NO is the new name for MID/RID.
These are documented in Table 4.7-22 ("DMA Transfer Request Detection
Operation Setting Table").
> It's certainly similar. I would say that REQ_NO + ACK_NO is the new MID_RID.
>
> > > + bits[10:16] - Specifies the ACK NO
> >
> > This is a new field.
> > However, it is not clear to me which value to specify here, and if this
> > is a hardware property at all, and thus needs to be specified in DT?
>
> It is a HW property. The value to set can be found in Table 4.6-27 from
> the HW User Manual, column "Ack No".
Thanks, but that table only shows values for SPDIF, SCU, SSIU and PFC
(for external DMA requests). The most familiar DMA clients listed
in Table 4.7-22 are missing. E.g. RSPI0 uses REQ_NO 0x8C/0x8D, but
which values does it need for ACK_NO?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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