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Message-ID: <202503011637.9HYajsft-lkp@intel.com>
Date: Sat, 1 Mar 2025 16:36:51 +0800
From: kernel test robot <lkp@...el.com>
To: Leilk Liu <leilk.liu@...iatek.com>, Mark Brown <broonie@...nel.org>
Cc: oe-kbuild-all@...ts.linux.dev, Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-spi@...r.kernel.org,
linux-mediatek@...ts.infradead.org,
Leilk Liu <leilk.liu@...iatek.com>
Subject: Re: [PATCH v1] spi: mt65xx: add PM QoS support
Hi Leilk,
kernel test robot noticed the following build warnings:
[auto build test WARNING on broonie-spi/for-next]
[also build test WARNING on linus/master v6.14-rc4 next-20250228]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Leilk-Liu/spi-mt65xx-add-PM-QoS-support/20250228-142359
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
patch link: https://lore.kernel.org/r/20250228062246.24186-1-leilk.liu%40mediatek.com
patch subject: [PATCH v1] spi: mt65xx: add PM QoS support
config: sh-randconfig-002-20250301 (https://download.01.org/0day-ci/archive/20250301/202503011637.9HYajsft-lkp@intel.com/config)
compiler: sh4-linux-gcc (GCC) 14.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250301/202503011637.9HYajsft-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503011637.9HYajsft-lkp@intel.com/
All warnings (new ones prefixed by >>):
>> drivers/spi/spi-mt65xx.c:177: warning: Function parameter or struct member 'qos_request' not described in 'mtk_spi'
vim +177 drivers/spi/spi-mt65xx.c
a568231f463225 Leilk Liu 2015-08-07 132
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 133 /**
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 134 * struct mtk_spi - SPI driver instance
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 135 * @base: Start address of the SPI controller registers
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 136 * @state: SPI controller state
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 137 * @pad_num: Number of pad_sel entries
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 138 * @pad_sel: Groups of pins to select
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 139 * @parent_clk: Parent of sel_clk
cae1578847e60a Yang Yingliang 2023-08-23 140 * @sel_clk: SPI host mux clock
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 141 * @spi_clk: Peripheral clock
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 142 * @spi_hclk: AHB bus clock
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 143 * @cur_transfer: Currently processed SPI transfer
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 144 * @xfer_len: Number of bytes to transfer
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 145 * @num_xfered: Number of transferred bytes
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 146 * @tx_sgl: TX transfer scatterlist
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 147 * @rx_sgl: RX transfer scatterlist
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 148 * @tx_sgl_len: Size of TX DMA transfer
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 149 * @rx_sgl_len: Size of RX DMA transfer
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 150 * @dev_comp: Device data structure
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 151 * @spi_clk_hz: Current SPI clock in Hz
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 152 * @spimem_done: SPI-MEM operation completion
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 153 * @use_spimem: Enables SPI-MEM
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 154 * @dev: Device pointer
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 155 * @tx_dma: DMA start for SPI-MEM TX
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 156 * @rx_dma: DMA start for SPI-MEM RX
3c5cd2e23fe4c8 AngeloGioacchino Del Regno 2022-04-07 157 */
a568231f463225 Leilk Liu 2015-08-07 158 struct mtk_spi {
a568231f463225 Leilk Liu 2015-08-07 159 void __iomem *base;
a568231f463225 Leilk Liu 2015-08-07 160 u32 state;
37457607ecaffe Leilk Liu 2015-10-26 161 int pad_num;
37457607ecaffe Leilk Liu 2015-10-26 162 u32 *pad_sel;
a740f4e684c020 Leilk Liu 2022-03-21 163 struct clk *parent_clk, *sel_clk, *spi_clk, *spi_hclk;
a568231f463225 Leilk Liu 2015-08-07 164 struct spi_transfer *cur_transfer;
a568231f463225 Leilk Liu 2015-08-07 165 u32 xfer_len;
00bca73bfca4fb Peter Shih 2018-09-10 166 u32 num_xfered;
a568231f463225 Leilk Liu 2015-08-07 167 struct scatterlist *tx_sgl, *rx_sgl;
a568231f463225 Leilk Liu 2015-08-07 168 u32 tx_sgl_len, rx_sgl_len;
a568231f463225 Leilk Liu 2015-08-07 169 const struct mtk_spi_compatible *dev_comp;
b0677bc0b5f41e Leilk Liu 2025-02-28 170 struct pm_qos_request qos_request;
162a31effc4182 Mason Zhang 2021-06-29 171 u32 spi_clk_hz;
9f763fd20da7d8 Leilk Liu 2022-03-21 172 struct completion spimem_done;
9f763fd20da7d8 Leilk Liu 2022-03-21 173 bool use_spimem;
9f763fd20da7d8 Leilk Liu 2022-03-21 174 struct device *dev;
9f763fd20da7d8 Leilk Liu 2022-03-21 175 dma_addr_t tx_dma;
9f763fd20da7d8 Leilk Liu 2022-03-21 176 dma_addr_t rx_dma;
a568231f463225 Leilk Liu 2015-08-07 @177 };
a568231f463225 Leilk Liu 2015-08-07 178
--
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