linux-kernel - Re: [PATCH v7 08/43] drm/mediatek: mtk_dpi: Support AFIFO 1T1P output and conversion

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Message-ID: <CAAOTY_9tjf8xw8n9euVK1OH7LLopNYwx5qzLJpQyQ+sKfVH6og@mail.gmail.com>
Date: Sun, 2 Mar 2025 22:01:15 +0800
From: Chun-Kuang Hu <chunkuang.hu@...nel.org>
To: Chun-Kuang Hu <chunkuang.hu@...nel.org>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, p.zabel@...gutronix.de, 
	airlied@...il.com, simona@...ll.ch, maarten.lankhorst@...ux.intel.com, 
	mripard@...nel.org, tzimmermann@...e.de, robh@...nel.org, krzk+dt@...nel.org, 
	conor+dt@...nel.org, matthias.bgg@...il.com, ck.hu@...iatek.com, 
	jitao.shi@...iatek.com, jie.qiu@...iatek.com, junzhi.zhao@...iatek.com, 
	dri-devel@...ts.freedesktop.org, linux-mediatek@...ts.infradead.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, kernel@...labora.com, 
	dmitry.baryshkov@...aro.org, lewis.liao@...iatek.com, 
	ives.chenjh@...iatek.com, tommyyl.chen@...iatek.com, 
	jason-jh.lin@...iatek.com
Subject: Re: [PATCH v7 08/43] drm/mediatek: mtk_dpi: Support AFIFO 1T1P output
 and conversion

Chun-Kuang Hu <chunkuang.hu@...nel.org> 於 2025年3月2日 週日 下午7:29寫道：
>
> Hi, Angelo:
>
> AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com> 於
> 2025年2月17日 週一 下午11:49寫道：
> >
> > On some SoCs, like MT8195 and MT8188, the DPI's FIFO controller
> > (afifo) supports outputting either one or two pixels per round
> > regardless of the input being 1T1P or 1T2P.
> >
> > Add a `output_1pixel` member to struct mtk_dpi_conf which, if
> > set, will enable outputting one pixel per clock.
> >
> > In case the input is two pixel per clock (1T2P), the AFIFO HW
> > will automatically (and internally) convert it to 1T1P.
>
> Applied to mediatek-drm-next [1], thanks.
>
> [1] https://web.git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git/log/?h=mediatek-drm-next

Fix build error then apply. Be care of patch quality.

Regards,
Chun-Kuang.

>
> Regards,
> Chun-Kuang.
>
> >
> > Reviewed-by: CK Hu <ck.hu@...iatek.com>
> > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> > ---
> >  drivers/gpu/drm/mediatek/mtk_dpi.c | 11 ++++++++++-
> >  1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 9f83e82437dd..e12dc73ed79c 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -147,6 +147,8 @@ struct mtk_dpi_factor {
> >   * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS.
> >   * @clocked_by_hdmi: HDMI IP outputs clock to dpi_pixel_clk input clock, needed
> >   *                  for DPI registers access.
> > + * @output_1pixel: Enable outputting one pixel per round; if the input is two pixel per
> > + *                 round, the DPI hardware will internally transform it to 1T1P.
> >   */
> >  struct mtk_dpi_conf {
> >         const struct mtk_dpi_factor *dpi_factor;
> > @@ -168,6 +170,7 @@ struct mtk_dpi_conf {
> >         u32 pixels_per_iter;
> >         bool edge_cfg_in_mmsys;
> >         bool clocked_by_hdmi;
> > +       bool output_1pixel;
> >  };
> >
> >  static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
> > @@ -653,7 +656,13 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
> >         if (dpi->conf->support_direct_pin) {
> >                 mtk_dpi_config_yc_map(dpi, dpi->yc_map);
> >                 mtk_dpi_config_2n_h_fre(dpi);
> > -               mtk_dpi_dual_edge(dpi);
> > +
> > +               /* DPI can connect to either an external bridge or the internal HDMI encoder */
> > +               if (dpi->conf->output_1pixel)
> > +                       mtk_dpi_mask(dpi, DPI_CON, DPI_OUTPUT_1T1P_EN, DPI_OUTPUT_1T1P_EN);
> > +               else
> > +                       mtk_dpi_dual_edge(dpi);
> > +
> >                 mtk_dpi_config_disable_edge(dpi);
> >         }
> >         if (dpi->conf->input_2p_en_bit) {
> > --
> > 2.48.1
> >