linux-kernel - Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for Renesas RZ/V2H(P) SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <825379ce-f6dc-4c96-9a73-3562ffac79bc@lunn.ch>
Date: Sun, 2 Mar 2025 22:33:56 +0100
From: Andrew Lunn <andrew@...n.ch>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Prabhakar <prabhakar.csengg@...il.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Giuseppe Cavallaro <peppe.cavallaro@...com>,
	Jose Abreu <joabreu@...opsys.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
	Biju Das <biju.das.jz@...renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for
 Renesas RZ/V2H(P) SoC

On Sun, Mar 02, 2025 at 07:28:09PM +0000, Russell King (Oracle) wrote:
> On Sun, Mar 02, 2025 at 08:10:26PM +0100, Andrew Lunn wrote:
> > > +  interrupts:
> > > +    items:
> > > +      - description: Subsystem interrupt
> > > +      - description: The interrupt to manage the remote wake-up packet detection
> > > +      - description: The interrupt that occurs when Tx/Rx enters/exits the LPI state
> > > +      - description: Per-channel transmission-0 completion interrupt
> > > +      - description: Per-channel transmission-1 completion interrupt
> > > +      - description: Per-channel transmission-2 completion interrupt
> > > +      - description: Per-channel transmission-3 completion interrupt
> > > +      - description: Per-channel receive-0 completion interrupt
> > > +      - description: Per-channel receive-1 completion interrupt
> > > +      - description: Per-channel receive-2 completion interrupt
> > > +      - description: Per-channel receive-3 completion interrupt
> > > +
> > > +  interrupt-names:
> > > +    items:
> > > +      - const: macirq
> > > +      - const: eth_wake_irq
> > > +      - const: eth_lpi
> > > +      - const: tx0
> > > +      - const: tx1
> > > +      - const: tx2
> > > +      - const: tx3
> > > +      - const: rx0
> > > +      - const: rx1
> > > +      - const: rx2
> > > +      - const: rx3
> > 
> > There has already been a discussion about trying to make the clock
> > names more uniform. But what about interrupts? Which of these are in
> > the IP databook? What names does the databook use for these
> > interrupts?
> 
> >From a quick look, I haven't found anything that suggests the above
> is possible, but it clearly is... so I'll look more tomorrow.

stmmac_platform.c:	stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
stmmac_platform.c:		platform_get_irq_byname_optional(pdev, "eth_wake_irq");
stmmac_platform.c:		platform_get_irq_byname_optional(pdev, "eth_lpi");
stmmac_platform.c:		platform_get_irq_byname_optional(pdev, "sfty");

So it looks like these are already in common code. So there should be
no need to name them in individual bindings, they can be named in the
common binding, and the vendor binding then just needs to indicate
they are required, or not.

What i have not yet figure out is how the names tx0, .. tx3 in this
binding are used. There is no code added in this patchset. Yet
loongson_dwmac_msi_config() and the intel stmmac_config_multi_msi()
are the only ones setting res->tx_irq[], neither of which are using
DT? I must be missing something somewhere.

    Andrew