linux-kernel - Re: [PATCH v1 1/8] MT9M114: Add bypass-pll DT-binding

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <Z8bpobFg3BnNHJ+/@mt.com>
Date: Tue, 4 Mar 2025 12:53:05 +0100
From: Mathis Foerst <mathis.foerst@...com>
To: Sakari Ailus <sakari.ailus@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org,
	Laurent Pinchart <laurent.pinchart@...asonboard.com>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-media@...r.kernel.org,
	devicetree@...r.kernel.org, manuel.traut@...com
Subject: Re: [PATCH v1 1/8] MT9M114: Add bypass-pll DT-binding

Hi Sakari

On Wed, Feb 26, 2025 at 04:08:39PM +0000, Sakari Ailus wrote:
> Hi Mathis,
> 
> Please see which subject prefix has been used in the past for these
> bindings.

Yes, I'm sorry for that. I adapted the subjects of the patches.

> 
> On Wed, Feb 26, 2025 at 04:39:22PM +0100, Mathis Foerst wrote:
> > The MT9M114 sensor has an internal PLL that generates the required SYSCLK
> > from EXTCLK. It also has the option to bypass the PLL and use EXTCLK
> > directly as SYSCLK.
> > The current driver implementation uses a hardcoded PLL configuration that
> > requires a specific EXTCLK frequency. Depending on the available clocks,
> > it can be desirable to use a different PLL configuration or to bypass it.
> > 
> > Add the 'bypass-pll' property to the MT9M114 DT-bindings to allow selecting
> > the PLL bypass mode.
> > 
> > Signed-off-by: Mathis Foerst <mathis.foerst@...com>
> > ---
> >  Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml | 4 ++++
> >  1 file changed, 4 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml
> > index f6b87892068a..72e258d57186 100644
> > --- a/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml
> > +++ b/Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml
> > @@ -70,6 +70,10 @@ properties:
> >            - bus-type
> >            - link-frequencies
> >  
> > +  onnn,bypass-pll:
> > +    description: Bypass the internal PLL of the sensor to use EXTCLK directly as SYSCLK.
> > +    type: boolean
> > +
> 
> But on the content itself: do you need this? Could you instead compare the
> external clock frequency to the link-frequencies property value(s)?

That should also work. I removed the DT binding and let the driver check if
EXTCLK matches the required SYSCLK for the given link frequency to decide if
the PLL should be bypassed.

> 
> >  required:
> >    - compatible
> >    - reg
> 
> -- 
> Regards,
> 
> Sakari Ailus

Best regards,
Mathis Foerst