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Message-ID: <0be31ecd-4386-4eb6-ad6f-a4409a3fc6ad@arm.com>
Date: Tue, 4 Mar 2025 12:28:23 +0000
From: Suzuki K Poulose <suzuki.poulose@....com>
To: Jie Gan <quic_jiegan@...cinc.com>, Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: Tingwei Zhang <quic_tingweiz@...cinc.com>,
Jinlong Mao <quic_jinlmao@...cinc.com>, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH v15 10/10] arm64: dts: qcom: sa8775p: Add CTCU and ETR
nodes
On 03/03/2025 03:29, Jie Gan wrote:
> Add CTCU and ETR nodes in DT to enable related functionalities.
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> Signed-off-by: Jie Gan <quic_jiegan@...cinc.com>
Assuming this goes via the soc tree,
Acked-by: Suzuki K Poulose <suzuki.poulose@....com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 153 ++++++++++++++++++++++++++
> 1 file changed, 153 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 3394ae2d1300..31aa94d2a043 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -2429,6 +2429,35 @@ crypto: crypto@...a000 {
> interconnect-names = "memory";
> };
>
> + ctcu@...1000 {
> + compatible = "qcom,sa8775p-ctcu";
> + reg = <0x0 0x04001000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + ctcu_in0: endpoint {
> + remote-endpoint = <&etr0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + ctcu_in1: endpoint {
> + remote-endpoint = <&etr1_out>;
> + };
> + };
> + };
> + };
> +
> stm: stm@...2000 {
> compatible = "arm,coresight-stm", "arm,primecell";
> reg = <0x0 0x4002000 0x0 0x1000>,
> @@ -2633,6 +2662,122 @@ qdss_funnel_in1: endpoint {
> };
> };
>
> + replicator@...6000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x04046000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + qdss_rep_in: endpoint {
> + remote-endpoint = <&swao_rep_out0>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + qdss_rep_out0: endpoint {
> + remote-endpoint = <&etr_rep_in>;
> + };
> + };
> + };
> + };
> +
> + tmc_etr: tmc@...8000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0x0 0x04048000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + iommus = <&apps_smmu 0x04c0 0x00>;
> +
> + arm,scatter-gather;
> +
> + in-ports {
> + port {
> + etr0_in: endpoint {
> + remote-endpoint = <&etr_rep_out0>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + etr0_out: endpoint {
> + remote-endpoint = <&ctcu_in0>;
> + };
> + };
> + };
> + };
> +
> + replicator@...e000 {
> + compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> + reg = <0x0 0x0404e000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + etr_rep_in: endpoint {
> + remote-endpoint = <&qdss_rep_out0>;
> + };
> + };
> + };
> +
> + out-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + etr_rep_out0: endpoint {
> + remote-endpoint = <&etr0_in>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + etr_rep_out1: endpoint {
> + remote-endpoint = <&etr1_in>;
> + };
> + };
> + };
> + };
> +
> + tmc_etr1: tmc@...f000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> + reg = <0x0 0x0404f000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> + iommus = <&apps_smmu 0x04a0 0x40>;
> +
> + arm,scatter-gather;
> + arm,buffer-size = <0x400000>;
> +
> + in-ports {
> + port {
> + etr1_in: endpoint {
> + remote-endpoint = <&etr_rep_out1>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + etr1_out: endpoint {
> + remote-endpoint = <&ctcu_in1>;
> + };
> + };
> + };
> + };
> +
> funnel@...4000 {
> compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> reg = <0x0 0x4b04000 0x0 0x1000>;
> @@ -2708,6 +2853,14 @@ out-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> + port@0 {
> + reg = <0>;
> +
> + swao_rep_out0: endpoint {
> + remote-endpoint = <&qdss_rep_in>;
> + };
> + };
> +
> port@1 {
> reg = <1>;
> swao_rep_out1: endpoint {
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