linux-kernel - Re: [PATCH RESEND v3 2/2] arm64: dts: socfpga: agilex5: add clock-names property to nand node

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Message-ID: <47cb57f6-2270-43af-8786-2827a08ddf9c@kernel.org>
Date: Tue, 4 Mar 2025 06:48:44 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: niravkumar.l.rabara@...el.com, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, nirav.rabara@...era.com, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH RESEND v3 2/2] arm64: dts: socfpga: agilex5: add
 clock-names property to nand node

On 2/27/25 22:53, niravkumar.l.rabara@...el.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> 
> Add required clock-names property to the nand node.
> 
> Fixes: 2d599bc43813 (arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA)
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> ---
>   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 51c6e19e40b8..27f75e1bc8eb 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -271,6 +271,7 @@ nand: nand-controller@...80000 {
>   			#size-cells = <0>;
>   			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>   			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
> +			clock-names = "nf_clk";
>   			cdns,board-delay-ps = <4830>;
>   			status = "disabled";
>   		};

Applied!

Thanks,
Dinh