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Message-ID: <20250304133626.709221c1@jic23-huawei>
Date: Tue, 4 Mar 2025 13:36:26 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Lothar Rubusch <l.rubusch@...il.com>
Cc: lars@...afoo.de, Michael.Hennerich@...log.com,
 linux-iio@...r.kernel.org, linux-kernel@...r.kernel.org,
 eraretuya@...il.com
Subject: Re: [PATCH v3 10/15] iio: accel: adxl345: extend sample frequency
 adjustments

On Thu, 20 Feb 2025 10:42:29 +0000
Lothar Rubusch <l.rubusch@...il.com> wrote:

> Introduce enums and functions to work with the sample frequency
> adjustments. Let the sample frequency adjust via IIO and configure
> a reasonable default.
> 
> Replace the old static sample frequency handling. The patch is in
> preparation for activity/inactivity handling. During adjustment of
> bw registers, measuring is disabled and afterwards enabled again.
> 
> Signed-off-by: Lothar Rubusch <l.rubusch@...il.com>
Hi Lothar, a few minor things inline.


> +static int adxl345_find_odr(struct adxl345_state *st, int val,
> +			    int val2, enum adxl345_odr *odr)
> +{
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(adxl345_odr_tbl); i++)
> +		if (val == adxl345_odr_tbl[i][0] &&
> +		    val2 == adxl345_odr_tbl[i][1])
> +			break;
> +
> +	if (i == ARRAY_SIZE(adxl345_odr_tbl))
> +		return -EINVAL;
> +
> +	*odr = i;
> +
> +	return 0;
Unless there will be more to do here later it would be fine to
move this setting *odr = i and return into the loop condition.
Then you can return -EINVAL directly if the loop finishes.
i.e.
	for (i = 0; i < ARRAY_SIZE(adxl345_odr_tbl); i++) {
		if (val == adxl345_odr_tbl[i][0] &&
		    val2 == adxl345_odr_tbl[i][1]) {
			*odr = i;
			return 0;
		}
	}
	return -EINVAL;

This is a very common pattern when there isn't much
to do on a match.

> +}
> +
> +static int adxl345_set_odr(struct adxl345_state *st, enum adxl345_odr odr)
> +{
> +	int ret;
> +
> +	ret = regmap_update_bits(st->regmap, ADXL345_REG_BW_RATE,
> +				 ADXL345_BW_RATE_MSK,
> +				 FIELD_PREP(ADXL345_BW_RATE_MSK, odr));
> +	if (ret)
> +		return ret;
I guess this makes sense in later patches, but if it doesn't get more
complex
	return regmap()

> +
> +	return 0;
> +}
> +
> +static int adxl345_read_avail(struct iio_dev *indio_dev,
> +			      struct iio_chan_spec const *chan,
> +			      const int **vals, int *type,
> +			      int *length, long mask)
> +{
> +	switch (mask) {
> +	case IIO_CHAN_INFO_SAMP_FREQ:
> +		*vals = (int *)adxl345_odr_tbl;
> +		*type = IIO_VAL_INT_PLUS_MICRO;
> +		*length = ARRAY_SIZE(adxl345_odr_tbl) * 2;
> +		return IIO_AVAIL_LIST;
> +	}
> +
> +	return -EINVAL;
> +}
> +
>  static int adxl345_read_raw(struct iio_dev *indio_dev,
>  			    struct iio_chan_spec const *chan,
>  			    int *val, int *val2, long mask)
>  {
>  	struct adxl345_state *st = iio_priv(indio_dev);
>  	__le16 accel;
> -	long long samp_freq_nhz;
>  	unsigned int regval;
> +	enum adxl345_odr odr;
>  	int ret;
>  
>  	switch (mask) {
> @@ -455,14 +542,12 @@ static int adxl345_read_raw(struct iio_dev *indio_dev,
>  		return IIO_VAL_INT;
>  	case IIO_CHAN_INFO_SAMP_FREQ:
>  		ret = regmap_read(st->regmap, ADXL345_REG_BW_RATE, &regval);
> -		if (ret < 0)
> +		if (ret)
>  			return ret;

Change is reasonable but unrelated to this patch that I can see. Should
really be a separate patch cleaning these up for all regmap calls.
I have no idea if there are others.

> -
> -		samp_freq_nhz = ADXL345_BASE_RATE_NANO_HZ <<
> -				(regval & ADXL345_BW_RATE);
> -		*val = div_s64_rem(samp_freq_nhz, NANOHZ_PER_HZ, val2);
> -
> -		return IIO_VAL_INT_PLUS_NANO;
> +		odr = FIELD_GET(ADXL345_BW_RATE_MSK, regval);
> +		*val = adxl345_odr_tbl[odr][0];
> +		*val2 = adxl345_odr_tbl[odr][1];
> +		return IIO_VAL_INT_PLUS_MICRO;
>  	}
>  
>  	return -EINVAL;
> @@ -473,7 +558,12 @@ static int adxl345_write_raw(struct iio_dev *indio_dev,
>  			     int val, int val2, long mask)
>  {
>  	struct adxl345_state *st = iio_priv(indio_dev);
> -	s64 n;
> +	enum adxl345_odr odr;
> +	int ret;
> +
> +	ret = adxl345_set_measure_en(st, false);
> +	if (ret)
> +		return ret;
>  
>  	switch (mask) {
>  	case IIO_CHAN_INFO_CALIBBIAS:
> @@ -481,20 +571,24 @@ static int adxl345_write_raw(struct iio_dev *indio_dev,
>  		 * 8-bit resolution at +/- 2g, that is 4x accel data scale
>  		 * factor
>  		 */
> -		return regmap_write(st->regmap,
> -				    ADXL345_REG_OFS_AXIS(chan->address),
> -				    val / 4);
> +		ret = regmap_write(st->regmap,
> +				   ADXL345_REG_OFS_AXIS(chan->address),
> +				   val / 4);
I'd do local error handling here...
> +		break;
>  	case IIO_CHAN_INFO_SAMP_FREQ:
> -		n = div_s64(val * NANOHZ_PER_HZ + val2,
> -			    ADXL345_BASE_RATE_NANO_HZ);
> -
> -		return regmap_update_bits(st->regmap, ADXL345_REG_BW_RATE,
> -					  ADXL345_BW_RATE,
> -					  clamp_val(ilog2(n), 0,
> -						    ADXL345_BW_RATE));
> +		ret = adxl345_find_odr(st, val, val2, &odr);
> +		if (ret)
> +			return ret;
> +		ret = adxl345_set_odr(st, odr);
and here just to be consistent with the case above here
		if (ret)
			return ret;
> +		break;
> +	default:
> +		return -EINVAL;
>  	}
>  
> -	return -EINVAL;
> +	if (ret)
This this one is never hit.

> +		return ret;
> +
> +	return adxl345_set_measure_en(st, true);
>  }
>  
>  static int adxl345_read_event_config(struct iio_dev *indio_dev,
> @@ -747,7 +841,7 @@ static int adxl345_write_raw_get_fmt(struct iio_dev *indio_dev,
>  	case IIO_CHAN_INFO_CALIBBIAS:
>  		return IIO_VAL_INT;
>  	case IIO_CHAN_INFO_SAMP_FREQ:
> -		return IIO_VAL_INT_PLUS_NANO;
> +		return IIO_VAL_INT_PLUS_MICRO;
>  	default:
>  		return -EINVAL;
>  	}
> @@ -760,19 +854,6 @@ static void adxl345_powerdown(void *ptr)
>  	adxl345_set_measure_en(st, false);
>  }
>  
> -static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
> -"0.09765625 0.1953125 0.390625 0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600 3200"
> -);


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