linux-kernel - Re: [v4 2/3] dt-bindings: fpga: Add Efinix SPI programming bindings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20250303-imply-ferocity-bbb6d866b149@wendy>
Date: Mon, 3 Mar 2025 10:31:44 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Ian Dannapel <iansdannapel@...il.com>
CC: Conor Dooley <conor@...nel.org>, <linux-fpga@...r.kernel.org>, Moritz
 Fischer <mdf@...nel.org>, Wu Hao <hao.wu@...el.com>, Xu Yilun
	<yilun.xu@...el.com>, Tom Rix <trix@...hat.com>, Rob Herring
	<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
	<conor+dt@...nel.org>, Neil Armstrong <neil.armstrong@...aro.org>, Jonathan
 Cameron <Jonathan.Cameron@...wei.com>, Rafał Miłecki
	<rafal@...ecki.pl>, Aradhya Bhatia <a-bhatia1@...com>, "open list:OPEN
 FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@...r.kernel.org>,
	open list <linux-kernel@...r.kernel.org>
Subject: Re: [v4 2/3] dt-bindings: fpga: Add Efinix SPI programming bindings

On Mon, Mar 03, 2025 at 11:10:53AM +0100, Ian Dannapel wrote:
> Hi Conor, thanks for the quick response.
> 
> On Fri, Feb 28, 2025 at 7:28 PM Conor Dooley <conor@...nel.org> wrote:
> > > +description: |
> > > +  Efinix FPGAs (Trion, Topaz, and Titanium families) support loading bitstreams
> > > +  through "SPI Passive Mode".
> > > +  Note 1: Only bus width 1x is supported.
> > > +  Note 2: Additional pins hogs for bus width configuration must be set
> > > +  elsewhere, if necessary.
> > > +  Note 3: Topaz and Titanium support is based on documentation but remains
> > > +  untested.
> >
> > Points 1 and 3 here seem to be driver limitations, and shouldn't really
> > be present in a document describing the hardware?
> >
> Yes, they are driver limitations and probably do not belong here.
> 
> > > +properties:
> > > +  compatible:
> > > +    enum:
> > > +      - efinix,trion-spi
> > > +      - efinix,titanium-spi
> > > +      - efinix,topaz-spi
> >
> > > +      - efinix,fpga-spi
> >
> > What hardware does this device represent? Other ones are obvious matches
> > to the families you mention, but what is this one?

> The proposed compatible is a generic fallback for any Efinix FPGA Series.

If it is a fallback, your binding should look like:
compatible:
  items:
    - enum:
        - efinix,trion-spi
        - efinix,titanium-spi
        - efinix,topaz-spi
    - const: efinix,fpga-spi

|+static const struct of_device_id efinix_spi_of_match[] = {
|+       { .compatible = "efinix,trion-spi", },
|+       { .compatible = "efinix,titanium-spi", },
|+       { .compatible = "efinix,topaz-spi", },

And these three compatibles can/should be removed from the driver, since
the fallback is required.

|+       { .compatible = "efinix,fpga-spi", },
|+       {}
|+};


Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)