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Message-ID: <CAL_Jsq+xZyP9Tx34F310ccsjHjvZPowgc39V-aihvtEm6G5K_g@mail.gmail.com>
Date: Tue, 4 Mar 2025 10:36:51 -0600
From: Rob Herring <robh+dt@...nel.org>
To: Sibi Sankar <quic_sibis@...cinc.com>
Cc: andersson@...nel.org, konradybcio@...nel.org, krzk+dt@...nel.org,
dmitry.baryshkov@...aro.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
conor+dt@...nel.org, abel.vesa@...aro.org, srinivas.kandagatla@...aro.org,
quic_jjohnson@...cinc.com, maz@...nel.org, jens.glathe@...schoolsolutions.biz
Subject: Re: [PATCH V1 3/3] arm64: dts: qcom: x1e001de-devkit: Enable external
DP support
On Fri, Oct 25, 2024 at 7:36 AM Sibi Sankar <quic_sibis@...cinc.com> wrote:
>
> The Qualcomm Snapdragon X Elite Devkit for Windows has the same
> configuration as the CRD variant i.e. all 3 of the type C ports
> support external DP altmode. Add all the nodes needed to enable
> them.
>
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
>
> PS: The ext display patch 3 needs pin-conf and updates from comments on
> the list. Just included it in the series so that people can get
> display up. Type c to DP was tested on all ports with [1] as the
> base branch.
>
> [1] https://git.codelinaro.org/abel.vesa/linux/-/commits/x1e-next-20240930
>
> arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 444 ++++++++++++++++++-
> 1 file changed, 438 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> index f169714abcd3..a1dc29a3a05e 100644
> --- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> @@ -82,7 +82,15 @@ port@1 {
> reg = <1>;
>
> pmic_glink_ss0_ss_in: endpoint {
> - remote-endpoint = <&usb_1_ss0_qmpphy_out>;
> + remote-endpoint = <&retimer_ss0_ss_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + pmic_glink_ss0_con_sbu_in: endpoint {
> + remote-endpoint = <&retimer_ss0_con_sbu_out>;
> };
> };
> };
> @@ -111,7 +119,15 @@ port@1 {
> reg = <1>;
>
> pmic_glink_ss1_ss_in: endpoint {
> - remote-endpoint = <&usb_1_ss1_qmpphy_out>;
> + remote-endpoint = <&retimer_ss1_ss_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + pmic_glink_ss1_con_sbu_in: endpoint {
> + remote-endpoint = <&retimer_ss1_con_sbu_out>;
> };
> };
> };
> @@ -140,7 +156,15 @@ port@1 {
> reg = <1>;
>
> pmic_glink_ss2_ss_in: endpoint {
> - remote-endpoint = <&usb_1_ss2_qmpphy_out>;
> + remote-endpoint = <&retimer_ss2_ss_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> +
> + pmic_glink_ss2_con_sbu_in: endpoint {
> + remote-endpoint = <&retimer_ss2_con_sbu_out>;
> };
> };
> };
> @@ -213,6 +237,150 @@ vreg_nvme: regulator-nvme {
> regulator-boot-on;
> };
>
> + vreg_rtmr0_1p15: regulator-rtmr0-1p15 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR0_1P15";
> + regulator-min-microvolt = <1150000>;
> + regulator-max-microvolt = <1150000>;
> +
> + gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&usb0_pwr_1p15_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr0_1p8: regulator-rtmr0-1p8 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR0_1P8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&usb0_1p8_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr0_3p3: regulator-rtmr0-3p3 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR0_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&usb0_3p3_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr1_1p15: regulator-rtmr1-1p15 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR1_1P15";
> + regulator-min-microvolt = <1150000>;
> + regulator-max-microvolt = <1150000>;
> +
> + gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr1_1p15_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr1_1p8: regulator-rtmr1-1p8 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR1_1P8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr1_1p8_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr1_3p3: regulator-rtmr1-3p3 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR1_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr1_3p3_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr2_1p15: regulator-rtmr2-1p15 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR2_1P15";
> + regulator-min-microvolt = <1150000>;
> + regulator-max-microvolt = <1150000>;
> +
> + gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr2_1p15_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr2_1p8: regulator-rtmr2-1p8 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR2_1P8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> +
> + gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr2_1p8_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> + vreg_rtmr2_3p3: regulator-rtmr2-3p3 {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_RTMR2_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&rtmr2_3p3_reg_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +
> vph_pwr: regulator-vph-pwr {
> compatible = "regulator-fixed";
>
> @@ -591,6 +759,207 @@ vreg_l3j_0p8: ldo3 {
> };
> };
>
> +&gpu {
> + status = "okay";
> +
> + zap-shader {
> + firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn";
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> +
> + status = "okay";
> +
> + typec-mux@8 {
> + compatible = "parade,ps8830";
> + reg = <0x08>;
> +
> + clocks = <&rpmhcc RPMH_RF_CLK5>;
> + clock-names = "xo";
clock-names is not part of the binding and dtbs_checks now complains.
Rob
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