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Message-ID: <2efa96d5-b26a-4058-a353-5dd2180ed502@intel.com>
Date: Tue, 4 Mar 2025 08:57:30 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Borislav Petkov <bp@...en8.de>
Cc: Rik van Riel <riel@...riel.com>, x86@...nel.org,
linux-kernel@...r.kernel.org, peterz@...radead.org,
dave.hansen@...ux.intel.com, zhengqi.arch@...edance.com,
nadav.amit@...il.com, thomas.lendacky@....com, kernel-team@...a.com,
linux-mm@...ck.org, akpm@...ux-foundation.org, jackmanb@...gle.com,
jannh@...gle.com, mhklinux@...look.com, andrew.cooper3@...rix.com,
Manali.Shukla@....com, mingo@...nel.org
Subject: Re: [PATCH v14 03/13] x86/mm: add INVLPGB support code
On 3/4/25 08:19, Borislav Petkov wrote:
> +static inline void __invlpgb_all(unsigned long asid, unsigned long pcid,
> + unsigned long addr, u16 nr_pages, u8 flags)
> +{
> + __invlpgb(asid, pcid, addr, nr_pages, 0, flags);
> +}
Why would __invlpg_all() need an 'addr' or 'nr_pages'? Shouldn't those be 0?
It's _better_ of course when it happens at a single site and it's close
to a prototype for __invlpgb(). But it's still a magic '0' that it's
impossible to make sense of without looking at the prototype.
Looking at the APM again... there really are three possible values for
ECX[31]:
0: increment by 4k
1: increment by 2M
X: Don't care, no increment is going to happen
What you wrote above could actually be written:
__invlpgb(asid, pcid, addr, nr_pages, 1, flags);
so the 0/1 is _actually_ completely random and arbitrary as far as the
spec goes.
Why does it matter?
It enables you to do sanity checking. For example, we could actually
enforce a rule that "no stride" can't be paired with any of the
per-address invalidation characteristics:
if (stride == NO_STRIDE) {
WARN_ON(flags & INVLPGB_FLAG_VA);
WARN_ON(addr);
WARN_ON(nr_pages);
}
That's impossible if you pass a 'bool' in.
But, honestly, I'm deep into nitpick mode here. I think differentiating
the three cases is worth it, but it's also not the hill I'm going to die
on. ;)
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