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Message-ID: <20250304180235.00005eb3@huawei.com>
Date: Tue, 4 Mar 2025 18:02:35 +0800
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Yicong Yang <yangyicong@...wei.com>
CC: <will@...nel.org>, <mark.rutland@....com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<prime.zeng@...ilicon.com>, <linuxarm@...wei.com>,
<yangyicong@...ilicon.com>, <wangyushan12@...wei.com>
Subject: Re: [PATCH 5/9] drivers/perf: hisi: Add support for HiSilicon SLLC
v3 PMU driver
On Tue, 18 Feb 2025 17:19:56 +0800
Yicong Yang <yangyicong@...wei.com> wrote:
> From: Junhao He <hejunhao3@...wei.com>
>
> SLLC v3 PMU has the following changes compared to previous version:
> a) update the register layout
> b) update the definition of SRCID_CTRL and TGTID_CTRL registers.
> To be compatible with v2, we use maximum width (11 bits)
> and mask the extra length for themselves.
> c) remove latency events (driver does not need to be adapted).
>
> SLLC v3 PMU is identified with HID HISI0264.
>
> Signed-off-by: Junhao He <hejunhao3@...wei.com>
> Signed-off-by: Yicong Yang <yangyicong@...ilicon.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
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