linux-kernel - Re: [PATCH 8/9] drivers/perf: hisi: Add support for HiSilicon NoC PMU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20250304182222.00006e5a@huawei.com>
Date: Tue, 4 Mar 2025 18:22:22 +0800
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Yicong Yang <yangyicong@...wei.com>
CC: <will@...nel.org>, <mark.rutland@....com>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
	<prime.zeng@...ilicon.com>, <linuxarm@...wei.com>,
	<yangyicong@...ilicon.com>, <wangyushan12@...wei.com>
Subject: Re: [PATCH 8/9] drivers/perf: hisi: Add support for HiSilicon NoC
 PMU

On Tue, 18 Feb 2025 17:19:59 +0800
Yicong Yang <yangyicong@...wei.com> wrote:

> From: Yicong Yang <yangyicong@...ilicon.com>
> 
> Adds the support for HiSilicon NoC (Network on Chip) PMU which
> will be used to monitor the events on the system bus. The PMU
> device will be named after the SCL ID (either Super CPU cluster
> or Super IO cluster) and the index ID, just similar to other
> HiSilicon Uncore PMUs. Below PMU formats are provided besides
> the event:
> 
> - ch: the transaction channel (data, request, response, etc) which
>   can be used to filter the counting.
> - tt_en: tracetag filtering enable. Just as other HiSilicon Uncore
>   PMUs the NoC PMU supports only counting the transactions with
>   tracetag.
> 
> The NoC PMU doesn't have an interrupt to indicate the overflow.
> However we have a 64 bit counter which is large enough and it's
> nearly impossible to overflow.
> 
> Signed-off-by: Yicong Yang <yangyicong@...ilicon.com>
A few minor comments inline.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
> ---
>  Documentation/admin-guide/perf/hisi-pmu.rst  |  11 +
>  drivers/perf/hisilicon/Makefile              |   3 +-
>  drivers/perf/hisilicon/hisi_uncore_noc_pmu.c | 391 +++++++++++++++++++
>  3 files changed, 404 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
> 
> diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst
> index 48992a0b8e94..d858bd3a8802 100644
> --- a/Documentation/admin-guide/perf/hisi-pmu.rst
> +++ b/Documentation/admin-guide/perf/hisi-pmu.rst
> @@ -112,6 +112,17 @@ uring channel. It is 2 bits. Some important codes are as follows:
>  - 2'b00: default value, count the events which sent to the both uring and
>    uring_ext channel;
>  
> +6. ch: NoC PMU supports to filter the event counts of certain transaction
supports filtering the event counts...
> +channel with this option. The current supported channels are as follows:
> +
> +- 3'b010: Request channel
> +- 3'b100: Snoop channel
> +- 3'b110: Response channel
> +- 3'b111: Data channel
> +
> +7. tt_en: NoC PMU supports to only count the transactions with tracetag by

supports counting only transactions that have tracetag set if this option is
set.

> +this option. See the 2nd list for more information about tracetag.
> +


> +static int hisi_noc_pmu_probe(struct platform_device *pdev)
> +{
> +	struct hisi_pmu *noc_pmu;
> +	char *name;
> +	int ret;
> +
> +	noc_pmu = devm_kzalloc(&pdev->dev, sizeof(*noc_pmu), GFP_KERNEL);
Quite a bit of use of &pdev->dev, maybe worth
struct device *dev = &pdev->dev; to shorten all these lines.

> +	if (!noc_pmu)
> +		return -ENOMEM;
> +
> +	/*
> +	 * HiSilicon Uncore PMU framework needs to get common hisi_pmu device
> +	 * by device's drvdata.

from device's drvdata