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Message-ID:
<DS7PR19MB8883C5887FE954B51DD7E4989DCB2@DS7PR19MB8883.namprd19.prod.outlook.com>
Date: Wed, 5 Mar 2025 17:41:26 +0400
From: George Moussalem <george.moussalem@...look.com>
To: linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org,
linux-phy@...ts.infradead.org,
andersson@...nel.org,
bhelgaas@...gle.com,
conor+dt@...nel.org,
devicetree@...r.kernel.org,
dmitry.baryshkov@...aro.org,
kishon@...nel.org,
konradybcio@...nel.org,
krzk+dt@...nel.org,
kw@...ux.com,
lpieralisi@...nel.org,
manivannan.sadhasivam@...aro.org,
p.zabel@...gutronix.de,
quic_nsekar@...cinc.com,
robh@...nel.org,
robimarko@...il.com,
vkoul@...nel.org
Cc: quic_srichara@...cinc.com,
George Moussalem <george.moussalem@...look.com>
Subject: [PATCH v3 1/6] dt-bindings: phy: qcom: uniphy-pcie: Add ipq5018 compatible
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
The IPQ5018 SoC contains a Gen2 1 and 2-lane PCIe UNIPHY which is the
same as the one found in IPQ5332. As such, add IPQ5018 compatible.
Signed-off-by: Nitheesh Sekar <quic_nsekar@...cinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
Signed-off-by: George Moussalem <george.moussalem@...look.com>
---
.../devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml
index e39168d55d23..bdfa3417069c 100644
--- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-uniphy-pcie-phy.yaml
@@ -11,11 +11,12 @@ maintainers:
- Varadarajan Narayanan <quic_varada@...cinc.com>
description:
- PCIe and USB combo PHY found in Qualcomm IPQ5332 SoC
+ PCIe and USB combo PHY found in Qualcomm IPQ5018 & IPQ5332 SoCs
properties:
compatible:
enum:
+ - qcom,ipq5018-uniphy-pcie-phy
- qcom,ipq5332-uniphy-pcie-phy
reg:
--
2.48.1
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