linux-kernel - [PATCH v3 6/6] arm64: dts: qcom: ipq5018: Enable PCIe

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Message-ID:
 <DS7PR19MB8883E1552A71914AF1E1B68D9DCB2@DS7PR19MB8883.namprd19.prod.outlook.com>
Date: Wed,  5 Mar 2025 17:41:31 +0400
From: George Moussalem <george.moussalem@...look.com>
To: linux-arm-msm@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org,
	linux-phy@...ts.infradead.org,
	andersson@...nel.org,
	bhelgaas@...gle.com,
	conor+dt@...nel.org,
	devicetree@...r.kernel.org,
	dmitry.baryshkov@...aro.org,
	kishon@...nel.org,
	konradybcio@...nel.org,
	krzk+dt@...nel.org,
	kw@...ux.com,
	lpieralisi@...nel.org,
	manivannan.sadhasivam@...aro.org,
	p.zabel@...gutronix.de,
	quic_nsekar@...cinc.com,
	robh@...nel.org,
	robimarko@...il.com,
	vkoul@...nel.org
Cc: quic_srichara@...cinc.com,
	George Moussalem <george.moussalem@...look.com>
Subject: [PATCH v3 6/6] arm64: dts: qcom: ipq5018: Enable PCIe

From: Sricharan Ramabadhran <quic_srichara@...cinc.com>

From: Nitheesh Sekar <quic_nsekar@...cinc.com>

Enable the PCIe controller and PHY nodes for RDP 432-c2.

Signed-off-by: Nitheesh Sekar <quic_nsekar@...cinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
Signed-off-by: George Moussalem <george.moussalem@...look.com>
---
 .../arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 38 +++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
index 8460b538eb6a..d49ff8e8f758 100644
--- a/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts
@@ -28,6 +28,20 @@ &blsp1_uart1 {
 	status = "okay";
 };
 
+&pcie0 {
+	pinctrl-0 = <&pcie0_default>;
+	pinctrl-names = "default";
+	
+	perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 16 GPIO_ACTIVE_LOW>;
+
+	status = "okay";
+};
+
+&pcie0_phy {
+	status = "okay";
+};
+
 &sdhc_1 {
 	pinctrl-0 = <&sdc_default_state>;
 	pinctrl-names = "default";
@@ -43,6 +57,30 @@ &sleep_clk {
 };
 
 &tlmm {
+	pcie0_default: pcie0-default-state {
+		clkreq-n-pins {
+			pins = "gpio14";
+			function = "pcie0_clk";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio15";
+			function = "gpio";
+			drive-strength = <8>;
+			bias-pull-up;
+			output-low;
+		};
+
+		wake-n-pins {
+			pins = "gpio16";
+			function = "pcie0_wake";
+			drive-strength = <8>;
+			bias-pull-up;
+		};
+	};
+
 	sdc_default_state: sdc-default-state {
 		clk-pins {
 			pins = "gpio9";
-- 
2.48.1