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Message-ID:
<DS7PR19MB888309B506D25ABA03F218EB9DCB2@DS7PR19MB8883.namprd19.prod.outlook.com>
Date: Wed, 5 Mar 2025 20:41:24 +0400
From: George Moussalem <george.moussalem@...look.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-phy@...ts.infradead.org,
andersson@...nel.org, bhelgaas@...gle.com, conor+dt@...nel.org,
devicetree@...r.kernel.org, dmitry.baryshkov@...aro.org, kishon@...nel.org,
konradybcio@...nel.org, krzk+dt@...nel.org, kw@...ux.com,
lpieralisi@...nel.org, manivannan.sadhasivam@...aro.org,
p.zabel@...gutronix.de, quic_nsekar@...cinc.com, robh@...nel.org,
robimarko@...il.com, vkoul@...nel.org
Cc: quic_srichara@...cinc.com
Subject: Re: [PATCH v3 3/6] dt-bindings: PCI: qcom: Add IPQ5018 SoC
On 3/5/25 19:51, Krzysztof Kozlowski wrote:
> On 05/03/2025 14:41, George Moussalem wrote:
>> From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
>>
>> From: Nitheesh Sekar <quic_nsekar@...cinc.com>
> Nope, that's not a correct chain. Apply it yourself and check results.
this series is dependent on the series to add support for IPQ5332:
https://lore.kernel.org/all/20250220094251.230936-1-quic_varada@quicinc.com/
which was applied to dt-bindings
>
>> Add support for the PCIe controller on the Qualcomm
>> IPQ5108 SoC to the bindings.
>>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Also not really correct. I did not provide tag to Nitheesh patch. How
> the tag was added there? b4?
the RB tag was passed on from here:
https://lore.kernel.org/all/20240830081132.4016860-3-quic_srichara@quicinc.com/
but I'll drop it as it changed quite a bit since.
>
>> Signed-off-by: Nitheesh Sekar <quic_nsekar@...cinc.com>
>> Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
>> Signed-off-by: George Moussalem <george.moussalem@...look.com>
>> ---
>> .../devicetree/bindings/pci/qcom,pcie.yaml | 49 +++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>>
> ...
>
>> + reset-names:
>> + items:
>> + - const: pipe # PIPE reset
>> + - const: sleep # Sleep reset
>> + - const: sticky # Core sticky reset
>> + - const: axi_m # AXI master reset
>> + - const: axi_s # AXI slave reset
>> + - const: ahb # AHB reset
>> + - const: axi_m_sticky # AXI master sticky reset
>> + - const: axi_s_sticky # AXI slave sticky reset
>> + interrupts:
>> + minItems: 8
>> + interrupt-names:
>> + minItems: 8
> Why is this flexible?
I'll restrict it with maxItems in next version, thanks
>
>> + items:
>> + - const: msi0
>> + - const: msi1
>> + - const: msi2
>> + - const: msi3
>> + - const: msi4
>> + - const: msi5
>> + - const: msi6
>> + - const: msi7
>> + - const: global
>> +
> Best regards,
> Krzysztof
Best regards,
George
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